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Message-ID: <1594719186.16172.35.camel@mhfsdcap03>
Date: Tue, 14 Jul 2020 17:33:06 +0800
From: Yong Wu <yong.wu@...iatek.com>
To: Pi-Hsun Shih <pihsun@...omium.org>
CC: Joerg Roedel <joro@...tes.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Robin Murphy <robin.murphy@....com>,
Will Deacon <will@...nel.org>,
Evan Green <evgreen@...omium.org>,
Tomasz Figa <tfiga@...gle.com>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>,
<srv_heupstream@...iatek.com>,
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<linux-arm-kernel@...ts.infradead.org>,
<iommu@...ts.linux-foundation.org>,
Youlin Pei (裴友林)
<youlin.pei@...iatek.com>, Nicolas Boichat <drinkcat@...omium.org>,
<anan.sun@...iatek.com>, <cui.zhang@...iatek.com>,
<chao.hao@...iatek.com>, <ming-fan.chen@...iatek.com>
Subject: Re: [PATCH 11/21] iommu/mediatek: Add power-domain operation
On Mon, 2020-07-13 at 15:03 +0800, Pi-Hsun Shih wrote:
> On Sat, Jul 11, 2020 at 2:51 PM Yong Wu <yong.wu@...iatek.com> wrote:
> >
> > In the previous SoC, the M4U HW is in the EMI power domain which is
> > always on. the latest M4U is in the display power domain which may be
> > turned on/off, thus we have to add pm_runtime interface for it.
> >
> > we should enable its power before M4U hw initial. and disable it after HW
> > initialize.
> >
> > When the engine work, the engine always enable the power and clocks for
> > smi-larb/smi-common, then the M4U's power will always be powered on
> > automatically via the device link with smi-common.
> >
> > Note: we don't enable the M4U power in iommu_map/unmap for tlb flush.
> > If its power already is on, of course it is ok. if the power is off,
> > the main tlb will be reset while M4U power on, thus the tlb flush while
> > m4u power off is unnecessary, just skip it.
> >
> > Signed-off-by: Yong Wu <yong.wu@...iatek.com>
> > ---
> > drivers/iommu/mtk_iommu.c | 54 ++++++++++++++++++++++++++++++++++-----
> > 1 file changed, 47 insertions(+), 7 deletions(-)
> > ...
> > for_each_m4u(data) {
> > + /* skip tlb flush when pm is not active */
> > + if (pm_runtime_enabled(data->dev) &&
> > + !pm_runtime_active(data->dev))
> > + continue;
> > +
>
> pm_runtime_active(dev) == false implies dev->power.disable_depth == 0,
> which implies pm_runtime_enabled(dev) == true, so the
> pm_runtime_enabled(data->dev) can be omitted here.
Yes. Thanks.
Will fix in next version.
>
> > spin_lock_irqsave(&data->tlb_lock, flags);
> > writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,
> > data->base + data->plat_data->inv_sel_reg);
> > ...
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