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Message-ID: <0d9d734a-84cf-2280-67b6-0c96247e1baf@semihalf.com>
Date:   Tue, 14 Jul 2020 12:26:30 +0200
From:   Tomasz Nowicki <tn@...ihalf.com>
To:     Will Deacon <will@...nel.org>
Cc:     robin.murphy@....com, joro@...tes.org, gregory.clement@...tlin.com,
        robh+dt@...nel.org, hannah@...vell.com,
        linux-kernel@...r.kernel.org, iommu@...ts.linux-foundation.org,
        devicetree@...r.kernel.org, catalin.marinas@....com,
        nadavh@...vell.com, linux-arm-kernel@...ts.infradead.org,
        mw@...ihalf.com
Subject: Re: [PATCH v3 0/4] Add system mmu support for Armada-806

Hi Will,

On 14.07.2020 10:19, Will Deacon wrote:
> Hi Tomasz,
> 
> On Thu, Jul 02, 2020 at 10:16:29PM +0200, Tomasz Nowicki wrote:
>> There were already two versions of series to support SMMU for AP806,
>> including workaround for accessing ARM SMMU 64bit registers.
>> First [1] by Hanna Hawa and second [2] by Gregory CLEMENT.
>> Since it got stuck this is yet another try. I incorporated the V2 comments,
>> mainly by moving workaround code to arm-smmu-impl.c as requested.
>>
>> For the record, AP-806 can't access SMMU registers with 64bit width,
>> this patches split the readq/writeq into two 32bit accesses instead
>> and update DT bindings.
>>
>> The series was successfully tested on a vanilla v5.8-rc3 kernel and
>> Intel e1000e PCIe NIC. The same for platform devices like SATA and USB.
>>
>> [1]: https://lkml.org/lkml/2018/10/15/373
>> [2]: https://lkml.org/lkml/2019/7/11/426
> 
> Do you have a v4 of this series? It looks like there were a few comments
> left to address, but with that I can pick it up for 5.9.

Yes, I will send it out today.

Thanks,
Tomasz

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