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Message-ID: <CAK8P3a09RW+zCMJ9Luh2C3NkYPdY4Esu6EKk_QX_i4faV-rUjg@mail.gmail.com>
Date: Tue, 14 Jul 2020 15:28:30 +0200
From: Arnd Bergmann <arnd@...db.de>
To: Serge Semin <Sergey.Semin@...kalelectronics.ru>
Cc: Thomas Gleixner <tglx@...utronix.de>,
"Rafael J. Wysocki" <rjw@...ysocki.net>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Serge Semin <fancer.lancer@...il.com>,
Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
Rob Herring <robh+dt@...nel.org>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <maz@...nel.org>, James Hogan <jhogan@...nel.org>,
"open list:BROADCOM NVRAM DRIVER" <linux-mips@...r.kernel.org>,
DTML <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5 5/6] bus: cdmm: Add MIPS R5 arch support
On Tue, Jul 14, 2020 at 2:58 PM Serge Semin
<Sergey.Semin@...kalelectronics.ru> wrote:
>
> config MIPS_CDMM
> bool "MIPS Common Device Memory Map (CDMM) Driver"
> - depends on CPU_MIPSR2
> + depends on CPU_MIPSR2 || CPU_MIPSR5
> help
Wouldn't a kernel built for P5600 have CPU_MIPSR2 set already?
I thought R5 was just a backwards-compatible extension of R2.
If not, what about R3?
Arnd
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