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Message-Id: <1594919915-5225-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Thu, 16 Jul 2020 18:18:19 +0100
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
To: Geert Uytterhoeven <geert+renesas@...der.be>,
Jens Axboe <axboe@...nel.dk>, Rob Herring <robh+dt@...nel.org>,
Vinod Koul <vkoul@...nel.org>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Marek Vasut <marek.vasut+renesas@...il.com>,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
Mark Brown <broonie@...nel.org>,
Niklas <niklas.soderlund@...natech.se>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Kishon Vijay Abraham I <kishon@...com>,
Liam Girdwood <lgirdwood@...il.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Magnus Damm <magnus.damm@...il.com>, devicetree@...r.kernel.org
Cc: linux-ide@...r.kernel.org, dmaengine@...r.kernel.org,
linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-media@...r.kernel.org, linux-pci@...r.kernel.org,
alsa-devel@...a-project.org, linux-renesas-soc@...r.kernel.org,
linux-usb@...r.kernel.org, Prabhakar <prabhakar.csengg@...il.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: [PATCH 04/20] arm64: dts: renesas: r8a774e1: Add SATA controller node
Add the SATA controller node to the RZ/G2H SoC specific dtsi.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...renesas.com>
---
arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
index 5805541b7882..4cd67f360cc0 100644
--- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
@@ -1499,6 +1499,18 @@
status = "disabled";
};
+ sata: sata@...00000 {
+ compatible = "renesas,sata-r8a774e1",
+ "renesas,rcar-gen3-sata";
+ reg = <0 0xee300000 0 0x200000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 815>;
+ power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+ resets = <&cpg 815>;
+ iommus = <&ipmmu_hc 2>;
+ status = "disabled";
+ };
+
gic: interrupt-controller@...10000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
--
2.17.1
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