lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 17 Jul 2020 13:02:00 -0700
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Matthew Hagan <mnhagan88@...il.com>, Andrew Lunn <andrew@...n.ch>,
        Jakub Kicinski <kuba@...nel.org>
Cc:     Vivien Didelot <vivien.didelot@...il.com>,
        "David S. Miller" <davem@...emloft.net>, linux@...linux.org.uk,
        netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
        John Crispin <john@...ozen.org>,
        Jonathan McDowell <noodles@...th.li>,
        Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org
Subject: Re: [PATCH 2/2] dt-bindings: net: dsa: qca8k: Add PORT0_PAD_CTRL
 properties



On 7/17/2020 12:26 PM, Matthew Hagan wrote:
> 
> 
> On 16/07/2020 23:32, Andrew Lunn wrote:
>> On Thu, Jul 16, 2020 at 03:09:25PM -0700, Jakub Kicinski wrote:
>>> On Mon, 13 Jul 2020 21:50:26 +0100 Matthew Hagan wrote:
>>>> Add names and decriptions of additional PORT0_PAD_CTRL properties.
>>>>
>>>> Signed-off-by: Matthew Hagan <mnhagan88@...il.com>
>>>> ---
>>>>  Documentation/devicetree/bindings/net/dsa/qca8k.txt | 8 ++++++++
>>>>  1 file changed, 8 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/net/dsa/qca8k.txt b/Documentation/devicetree/bindings/net/dsa/qca8k.txt
>>>> index ccbc6d89325d..3d34c4f2e891 100644
>>>> --- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt
>>>> +++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt
>>>> @@ -13,6 +13,14 @@ Optional properties:
>>>>  
>>>>  - reset-gpios: GPIO to be used to reset the whole device
>>>>  
>>>> +Optional MAC configuration properties:
>>>> +
>>>> +- qca,exchange-mac0-mac6:	If present, internally swaps MAC0 and MAC6.
>>>
>>> Perhaps we can say a little more here?
>>>
>>>> +- qca,sgmii-rxclk-falling-edge:	If present, sets receive clock phase to
>>>> +				falling edge.
>>>> +- qca,sgmii-txclk-falling-edge:	If present, sets transmit clock phase to
>>>> +				falling edge.
>>>
>>> These are not something that other vendors may implement and therefore
>>> something we may want to make generic? Andrew?
>>
>> I've never seen any other vendor implement this. Which to me makes me
>> think this is a vendor extension, to Ciscos vendor extension of
>> 1000BaseX.
>>
>> Matthew, do you have a real use cases of these? I don't see a DT patch
>> making use of them. And if you do, what is the PHY on the other end
>> which also allows you to invert the clocks?
>>
> The use case I am working on is the Cisco Meraki MX65 which requires bit
> 18 set (qca,sgmii-txclk-falling-edge). On the other side is a BCM58625
> SRAB with ports 4 and 5 in SGMII mode. There is no special polarity
> configuration set on this side though I do have very limited info on
> what is available. The settings I have replicate the vendor
> configuration extracted from the device.

The only polarity change that I am aware of on the BCM58625 side is to
allow for the TXDP/TXDN to be swapped, this is achieved by setting bit 5
in the TX_ACONTROL0 register (block address is 0x8060), that does look
different than what this is controlling though.
-- 
Florian

Powered by blists - more mailing lists