[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <BBA90891-8A4A-4A39-BF51-13EECDE414F1@amazon.com>
Date: Fri, 17 Jul 2020 15:25:05 +0000
From: "Saidi, Ali" <alisaidi@...zon.com>
To: Thomas Gleixner <tglx@...utronix.de>,
LKML <linux-kernel@...r.kernel.org>
CC: "x86@...nel.org" <x86@...nel.org>,
"Herrenschmidt, Benjamin" <benh@...zon.com>,
Ali Saidi <aliaidi@...zon.com>, Marc Zyngier <maz@...nel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH] genirq/affinity: Handle affinity setting on inactive
interrupts correctly
On 7/17/20, 9:00 AM, "Thomas Gleixner" <tglx@...utronix.de> wrote:
Setting interrupt affinity on inactive interrupts is inconsistent when
hierarchical irq domains are enabled. The core code should just store the
affinity and not call into the irq chip driver for inactive interrupts
because the chip drivers may not be in a state to handle such requests.
X86 has a hacky workaround for that but all other irq chips have not which
causes problems e.g. on GIC V3 ITS.
Instead of adding more ugly hacks all over the place, solve the problem in
the core code. If the affinity is set on an inactive interrupt then:
- Store it in the irq descriptors affinity mask
- Update the effective affinity to reflect that so user space has
a consistent view
- Don't call into the irq chip driver
This is the core equivalent of the X86 workaround and works correctly
because the affinity setting is established in the irq chip when the
interrupt is activated later on.
Note, that this is only effective when hierarchical irq domains are enabled
by the architecture. Doing it unconditionally would break legacy irq chip
implementations.
For hierarchial irq domains this works correctly as none of the drivers can
have a dependency on affinity setting in inactive state by design.
Remove the X86 workaround as it is not longer required.
Fixes: 02edee152d6e ("x86/apic/vector: Ignore set_affinity call for inactive interrupts")
Reported-by: Ali Saidi <alisaidi@...zon.com>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Cc: stable@...r.kernel.org
Link: https://lore.kernel.org/r/20200529015501.15771-1-alisaidi@amazon.com
---
Tested on an arm64 system that originally experienced the issue and couldn't reproduce it with this patch.
Tested-by: Ali Saidi <alisaidi@...zon.com>
Thanks,
Ali
Powered by blists - more mailing lists