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Message-ID: <20200720155116.GA4243@jcrouse1-lnx.qualcomm.com>
Date: Mon, 20 Jul 2020 09:51:16 -0600
From: Jordan Crouse <jcrouse@...eaurora.org>
To: Will Deacon <will@...nel.org>
Cc: Bjorn Andersson <bjorn.andersson@...aro.org>,
Robin Murphy <robin.murphy@....com>,
Joerg Roedel <joro@...tes.org>,
Thierry Reding <thierry.reding@...il.com>,
Laurentiu Tudor <laurentiu.tudor@....com>,
linux-arm-kernel@...ts.infradead.org,
iommu@...ts.linux-foundation.org, linux-kernel@...r.kernel.org,
Jonathan Marek <jonathan@...ek.ca>,
linux-arm-msm@...r.kernel.org,
John Stultz <john.stultz@...aro.org>,
Vinod Koul <vkoul@...nel.org>
Subject: Re: [PATCH v2 2/5] iommu/arm-smmu: Emulate bypass by using context
banks
On Mon, Jul 20, 2020 at 09:58:42AM +0100, Will Deacon wrote:
> On Thu, Jul 16, 2020 at 05:16:16PM -0700, Bjorn Andersson wrote:
> > Some firmware found on various Qualcomm platforms traps writes to S2CR
> > of type BYPASS and writes FAULT into the register. This prevents us from
> > marking the streams for the display controller as BYPASS to allow
> > continued scanout of the screen through the initialization of the ARM
> > SMMU.
> >
> > This adds a Qualcomm specific cfg_probe function, which probes the
> > behavior of the S2CR registers and if found faulty enables the related
> > quirk. Based on this quirk context banks are allocated for IDENTITY
> > domains as well, but with ARM_SMMU_SCTLR_M omitted.
> >
> > The result is valid stream mappings, without translation.
> >
> > Tested-by: John Stultz <john.stultz@...aro.org>
> > Tested-by: Vinod Koul <vkoul@...nel.org>
> > Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org>
> > ---
> >
> > Changes since v1:
> > - Picked up tested-by
> >
> > drivers/iommu/arm-smmu-qcom.c | 21 +++++++++++++++++++++
> > drivers/iommu/arm-smmu.c | 14 ++++++++++++--
> > drivers/iommu/arm-smmu.h | 3 +++
> > 3 files changed, 36 insertions(+), 2 deletions(-)
>
> [...]
>
> > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
> > index fb85e716ae9a..5d5fe6741ed4 100644
> > --- a/drivers/iommu/arm-smmu.c
> > +++ b/drivers/iommu/arm-smmu.c
> > @@ -654,7 +654,9 @@ static void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx)
> >
> > /* SCTLR */
> > reg = ARM_SMMU_SCTLR_CFIE | ARM_SMMU_SCTLR_CFRE | ARM_SMMU_SCTLR_AFE |
> > - ARM_SMMU_SCTLR_TRE | ARM_SMMU_SCTLR_M;
> > + ARM_SMMU_SCTLR_TRE;
> > + if (cfg->m)
> > + reg |= ARM_SMMU_SCTLR_M;
> > if (stage1)
> > reg |= ARM_SMMU_SCTLR_S1_ASIDPNE;
> > if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
> > @@ -678,7 +680,11 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
> > if (smmu_domain->smmu)
> > goto out_unlock;
> >
> > - if (domain->type == IOMMU_DOMAIN_IDENTITY) {
> > + /*
> > + * Nothing to do for IDENTITY domains,unless disabled context banks are
> > + * used to emulate bypass mappings on Qualcomm platforms.
> > + */
> > + if (domain->type == IOMMU_DOMAIN_IDENTITY && !smmu->qcom_bypass_quirk) {
>
> Given that the other thread [1] with Jordan (why haven't you cc'd him?! --
> adding him now) has identified the need for a callback to allocate the
> context bank, why don't we use the same sort of idea here? If the impl
> provides a CB allocator function, call it irrespective of the domain type.
> If it allocates a domain even for an identity domain, then we can install
> if with SCTLR.M clear.
Here is what I have so far for the context bank allocator. I think its a good
start, but it still feels a bit half baked, so comments definitely welcome.
https://lists.linuxfoundation.org/pipermail/iommu/2020-July/046754.html
https://lists.linuxfoundation.org/pipermail/iommu/2020-July/046752.html
> Will
>
> [1] https://lore.kernel.org/r/20200716151625.GA14526@jcrouse1-lnx.qualcomm.com
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