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Message-ID: <CAAhV-H4i52bxu=fnGhZ=OD0HWC9G2MJ-EN-cSzRNA_9GgBmXPg@mail.gmail.com>
Date: Mon, 20 Jul 2020 18:04:43 +0800
From: Huacai Chen <chenhc@...ote.com>
To: Jiaxun Yang <jiaxun.yang@...goat.com>
Cc: "open list:MIPS" <linux-mips@...r.kernel.org>,
Rob Herring <robh+dt@...nel.org>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Frank Rowand <frowand.list@...il.com>,
Paul Burton <paulburton@...nel.org>,
Arnd Bergmann <arnd@...db.de>,
Nick Desaulniers <ndesaulniers@...gle.com>,
devicetree@...r.kernel.org, LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 5/5] MIPS: Loongson64: Add ISA node for LS7A PCH
Hi, Jiaxun,
On Mon, Jul 20, 2020 at 3:48 PM Jiaxun Yang <jiaxun.yang@...goat.com> wrote:
>
> Although currently we're not enabling any ISA device in devicetree,
> but this node is required to express the ranges of address reserved
> for ISA.
>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@...goat.com>
> ---
> arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
> index 1c286bb8c703..724929ea3f5f 100644
> --- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
> +++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
> @@ -19,6 +19,13 @@ pic: interrupt-controller@...00000 {
> #interrupt-cells = <2>;
> };
>
> + isa {
> + compatible = "isa";
> + #address-cells = <2>;
> + #size-cells = <1>;
> + ranges = <1 0 0 0x18000000 0x20000>;
> + };
> +
Maybe it is better to define isa after pci, which keeps the
consistency as rs780e.
Huacai
> pci@...00000 {
> compatible = "loongson,ls7a-pci";
> device_type = "pci";
> --
> 2.28.0.rc1
>
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