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Message-ID: <CAK8P3a13vZJyOGZ1FpS98ytVC57P6NgmQpSfhf2h9b7meQLtcw@mail.gmail.com>
Date: Mon, 20 Jul 2020 12:45:14 +0200
From: Arnd Bergmann <arnd@...db.de>
To: Jiaxun Yang <jiaxun.yang@...goat.com>
Cc: "open list:BROADCOM NVRAM DRIVER" <linux-mips@...r.kernel.org>,
Rob Herring <robh+dt@...nel.org>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Huacai Chen <chenhc@...ote.com>,
Frank Rowand <frowand.list@...il.com>,
Paul Burton <paulburton@...nel.org>,
Nathan Chancellor <natechancellor@...il.com>,
Nick Desaulniers <ndesaulniers@...gle.com>,
DTML <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 3/5] MIPS: Loongson64: Enlarge IO_SPACE_LIMIT
On Mon, Jul 20, 2020 at 9:44 AM Jiaxun Yang <jiaxun.yang@...goat.com> wrote:
>
> It can be very big on LS7A PCH systems.
>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@...goat.com>
> ---
> * On MIPS I/O ports are memory mapped, so we access them using normal
> diff --git a/arch/mips/include/asm/mach-loongson64/spaces.h b/arch/mips/include/asm/mach-loongson64/spaces.h
> index 3de0ac9d8829..b99b43854929 100644
> --- a/arch/mips/include/asm/mach-loongson64/spaces.h
> +++ b/arch/mips/include/asm/mach-loongson64/spaces.h
> @@ -11,8 +11,7 @@
> #define PCI_IOSIZE SZ_16M
> #define MAP_BASE (PCI_IOBASE + PCI_IOSIZE)
>
> -/* Reserved at the start of PCI_IOBASE for legacy drivers */
> -#define MMIO_LOWER_RESERVED 0x10000
> +#define IO_SPACE_LIMIT 0x00ffffff
Does this mean that firmware may already have assigned "high" I/O space
numbers for devices? I'm not sure how well device drivers can generally
deal with port numbers that don't fit into a 16-bit integer.
Is it possible to run a 32-bit kernel on these machines? If yes, than
taking up 16MB of virtual addresses may also become a problem.
In practice, one should rarely need more than a few kb worth of
port numbers, unless you expect to see hundreds of legacy PCI
devices.
Arnd
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