lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Mon, 20 Jul 2020 15:46:34 +0200 From: Linus Walleij <linus.walleij@...aro.org> To: Jianqun Xu <jay.xu@...k-chips.com>, Heiko Stübner <heiko@...ech.de> Cc: "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>, "open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, Kever Yang <kever.yang@...k-chips.com>, David Wu <david.wu@...k-chips.com> Subject: Re: [PATCH 01/13] pinctrl: rockchip: add nr_pins to rockchip_pin_ctrl On Fri, Jul 17, 2020 at 3:49 AM Jianqun Xu <jay.xu@...k-chips.com> wrote: > Add nr_pins to rockchip_pin_ctrl by hand, instead of calculating during > driver probe. This patch is prepare work for making rockchip_pin_ctrl to > be const type. > > Signed-off-by: Jianqun Xu <jay.xu@...k-chips.com> I'm letting Heiko review this series, to me it looks all right. Yours, Linus Walleij
Powered by blists - more mailing lists