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Message-ID: <20200721000850.370-1-shreyas.joshi@biamp.com>
Date: Tue, 21 Jul 2020 10:08:50 +1000
From: Shreyas Joshi <shreyas.joshi@...mp.com>
To: broonie@...nel.org, linux-spi@...r.kernel.org,
shreyasjoshi15@...il.com
CC: linux-kernel@...r.kernel.org,
Shreyas Joshi <shreyas.joshi@...mp.com>
Subject: [PATCH] spi: spi-cadence: add support for chip select high
The spi cadence driver should support spi-cs-high in mode bits
so that the peripherals that needs the chip select to be high active can
use it. Add the SPI-CS-HIGH flag in the supported mode bits.
Signed-off-by: Shreyas Joshi <shreyas.joshi@...mp.com>
---
drivers/spi/spi-cadence.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c
index 82a0ee09cbe1..2b6b9c1ad9d0 100644
--- a/drivers/spi/spi-cadence.c
+++ b/drivers/spi/spi-cadence.c
@@ -556,7 +556,7 @@ static int cdns_spi_probe(struct platform_device *pdev)
master->unprepare_transfer_hardware = cdns_unprepare_transfer_hardware;
master->set_cs = cdns_spi_chipselect;
master->auto_runtime_pm = true;
- master->mode_bits = SPI_CPOL | SPI_CPHA;
+ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
/* Set to default valid value */
master->max_speed_hz = clk_get_rate(xspi->ref_clk) / 4;
--
2.20.1
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