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Message-ID: <20200721173859.GG1180481@tassilo.jf.intel.com>
Date:   Tue, 21 Jul 2020 10:38:59 -0700
From:   Andi Kleen <ak@...ux.intel.com>
To:     Peter Zijlstra <peterz@...radead.org>
Cc:     kan.liang@...ux.intel.com, acme@...hat.com, mingo@...nel.org,
        linux-kernel@...r.kernel.org, jolsa@...nel.org, eranian@...gle.com,
        alexander.shishkin@...ux.intel.com
Subject: Re: [PATCH V6 09/14] perf/x86/intel: Support TopDown metrics on Ice
 Lake

> Also, that for_each_set_bit() loop, trying to find the events to
> update...
> 
> Can't we, instead, make the SLOTS update advance 5 running counters in
> cpuc and feed the events off of that?

The original patches implemented this through a perf transaction and a
cache.  I think what you're suggesting is similar to the old cache.

-Andi

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