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Message-ID: <1eb11f7f-603a-4aa9-92c5-1e18e6e2ce01@gmail.com>
Date: Wed, 22 Jul 2020 00:09:06 +0200
From: Matthias Brugger <matthias.bgg@...il.com>
To: Hanks Chen <hanks.chen@...iatek.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Sean Wang <sean.wang@...nel.org>,
mtk01761 <wendell.lin@...iatek.com>,
Andy Teng <andy.teng@...iatek.com>, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
wsd_upstream@...iatek.com, CC Hwang <cc.hwang@...iatek.com>,
Loda Chou <loda.chou@...iatek.com>
Subject: Re: [PATCH v8 6/7] arm64: dts: add dts nodes for MT6779
On 21/07/2020 08:00, Hanks Chen wrote:
> On Mon, 2020-07-20 at 18:13 +0200, Matthias Brugger wrote:
>>
>> On 16/07/2020 06:04, Hanks Chen wrote:
>>>>> + uart2: serial@...04000 {
>>>>> + compatible = "mediatek,mt6779-uart",
>>>>> + "mediatek,mt6577-uart";
>>>>> + reg = <0 0x11004000 0 0x400>;
>>>>> + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_LOW>;
>>>>> + clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_UART2>;
>>>>> + clock-names = "baud", "bus";
>>>>> + status = "disabled";
>>>>> + };
>>>>
>>>> Devicetree describes the HW we have. As far as I know, we have 4 UARTs on
>>>> MT6779. So we should list them all here.
>>>>
>>>
>>> Actually, We have only 3 UARTs HW on MT6779, but have 4 UART clk in
>>> header file of clk.
>>
>> Correct, I got confused by the four clocks.
>> With that clarified I'm fine with the patch and will take it as soon as the
>> clock driver patch is accepted.
>>
>> Regards,
>> Matthias
>>
> Got it, I send a new serial to fix the redundant UART clk
> https://lkml.org/lkml/2020/7/21/45
>
Ok, also I was talking about:
[PATCH v8 7/7] clk: mediatek: add UART0 clock support
Regards,
Matthias
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