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Message-ID: <20200721232913.4979-1-grygorii.strashko@ti.com>
Date: Wed, 22 Jul 2020 02:29:10 +0300
From: Grygorii Strashko <grygorii.strashko@...com>
To: Kishon Vijay Abraham I <kishon@...com>
CC: Sekhar Nori <nsekhar@...com>, <linux-kernel@...r.kernel.org>,
Grygorii Strashko <grygorii.strashko@...com>
Subject: [PATCH 0/3] phy: ti: gmii-sel: update to support multiport k3 devices
Hi Kishon,
This series introduces support for multiport K3 CPSW devices like one, which
can be found on J721E SoC (MAIN CPSW).
The first two patches are preparation changes. The Patch 3 add support for
retrieving number of ports and base registers offset from DT.
Grygorii Strashko (3):
phy: ti: gmii-sel: move phy init in separate function
phy: ti: gmii-sel: use features mask during init
phy: ti: gmii-sel: retrieve ports number and base offset from dt
drivers/phy/ti/phy-gmii-sel.c | 159 ++++++++++++++++++++--------------
1 file changed, 96 insertions(+), 63 deletions(-)
--
2.17.1
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