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Message-ID: <87o8o9p356.fsf@vitty.brq.redhat.com>
Date: Tue, 21 Jul 2020 12:35:01 +0200
From: Vitaly Kuznetsov <vkuznets@...hat.com>
To: Wanpeng Li <kernellwp@...il.com>, linux-kernel@...r.kernel.org,
kvm@...r.kernel.org
Cc: Paolo Bonzini <pbonzini@...hat.com>,
Sean Christopherson <sean.j.christopherson@...el.com>,
Wanpeng Li <wanpengli@...cent.com>,
Jim Mattson <jmattson@...gle.com>,
Joerg Roedel <joro@...tes.org>
Subject: Re: [PATCH 1/2] KVM: LAPIC: Prevent setting the tscdeadline timer if the lapic is hw disabled
Wanpeng Li <kernellwp@...il.com> writes:
> From: Wanpeng Li <wanpengli@...cent.com>
>
> Prevent setting the tscdeadline timer if the lapic is hw disabled.
>
> Signed-off-by: Wanpeng Li <wanpengli@...cent.com>
> ---
> arch/x86/kvm/lapic.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index 5bf72fc..4ce2ddd 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -2195,7 +2195,7 @@ void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data)
> {
> struct kvm_lapic *apic = vcpu->arch.apic;
>
> - if (!lapic_in_kernel(vcpu) || apic_lvtt_oneshot(apic) ||
> + if (!kvm_apic_present(vcpu) || apic_lvtt_oneshot(apic) ||
> apic_lvtt_period(apic))
> return;
Out of pure curiosity, what is the architectural behavior if I disable
LAPIC, write to IA32_TSC_DEADLINE and then re-enable LAPIC before the
timer was supposed to fire?
--
Vitaly
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