| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <1595333413-30052-4-git-send-email-sumit.garg@linaro.org>
Date: Tue, 21 Jul 2020 17:40:11 +0530
From: Sumit Garg <sumit.garg@...aro.org>
To: gregkh@...uxfoundation.org, daniel.thompson@...aro.org,
dianders@...omium.org, linux-serial@...r.kernel.org,
kgdb-bugreport@...ts.sourceforge.net
Cc: jslaby@...e.com, linux@...linux.org.uk, jason.wessel@...driver.com,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Sumit Garg <sumit.garg@...aro.org>
Subject: [RFC 3/5] serial: amba-pl011: Re-order APIs definition
A future patch will need to call pl011_hwinit() and
pl011_enable_interrupts() before they are currently defined. Move
them closer to the front of the file. There is no change in the
implementation of either function.
Signed-off-by: Sumit Garg <sumit.garg@...aro.org>
---
drivers/tty/serial/amba-pl011.c | 148 ++++++++++++++++++++--------------------
1 file changed, 74 insertions(+), 74 deletions(-)
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index 8efd7c2..0983c5e 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -1581,6 +1581,80 @@ static void pl011_break_ctl(struct uart_port *port, int break_state)
spin_unlock_irqrestore(&uap->port.lock, flags);
}
+static int pl011_hwinit(struct uart_port *port)
+{
+ struct uart_amba_port *uap =
+ container_of(port, struct uart_amba_port, port);
+ int retval;
+
+ /* Optionaly enable pins to be muxed in and configured */
+ pinctrl_pm_select_default_state(port->dev);
+
+ /*
+ * Try to enable the clock producer.
+ */
+ retval = clk_prepare_enable(uap->clk);
+ if (retval)
+ return retval;
+
+ uap->port.uartclk = clk_get_rate(uap->clk);
+
+ /* Clear pending error and receive interrupts */
+ pl011_write(UART011_OEIS | UART011_BEIS | UART011_PEIS |
+ UART011_FEIS | UART011_RTIS | UART011_RXIS,
+ uap, REG_ICR);
+
+ /*
+ * Save interrupts enable mask, and enable RX interrupts in case if
+ * the interrupt is used for NMI entry.
+ */
+ uap->im = pl011_read(uap, REG_IMSC);
+ pl011_write(UART011_RTIM | UART011_RXIM, uap, REG_IMSC);
+
+ if (dev_get_platdata(uap->port.dev)) {
+ struct amba_pl011_data *plat;
+
+ plat = dev_get_platdata(uap->port.dev);
+ if (plat->init)
+ plat->init();
+ }
+ return 0;
+}
+
+/*
+ * Enable interrupts, only timeouts when using DMA
+ * if initial RX DMA job failed, start in interrupt mode
+ * as well.
+ */
+static void pl011_enable_interrupts(struct uart_amba_port *uap)
+{
+ unsigned int i;
+
+ spin_lock_irq(&uap->port.lock);
+
+ /* Clear out any spuriously appearing RX interrupts */
+ pl011_write(UART011_RTIS | UART011_RXIS, uap, REG_ICR);
+
+ /*
+ * RXIS is asserted only when the RX FIFO transitions from below
+ * to above the trigger threshold. If the RX FIFO is already
+ * full to the threshold this can't happen and RXIS will now be
+ * stuck off. Drain the RX FIFO explicitly to fix this:
+ */
+ for (i = 0; i < uap->fifosize * 2; ++i) {
+ if (pl011_read(uap, REG_FR) & UART01x_FR_RXFE)
+ break;
+
+ pl011_read(uap, REG_DR);
+ }
+
+ uap->im = UART011_RTIM;
+ if (!pl011_dma_rx_running(uap))
+ uap->im |= UART011_RXIM;
+ pl011_write(uap->im, uap, REG_IMSC);
+ spin_unlock_irq(&uap->port.lock);
+}
+
#ifdef CONFIG_CONSOLE_POLL
static void pl011_quiesce_irqs(struct uart_port *port)
@@ -1639,46 +1713,6 @@ static void pl011_put_poll_char(struct uart_port *port,
#endif /* CONFIG_CONSOLE_POLL */
-static int pl011_hwinit(struct uart_port *port)
-{
- struct uart_amba_port *uap =
- container_of(port, struct uart_amba_port, port);
- int retval;
-
- /* Optionaly enable pins to be muxed in and configured */
- pinctrl_pm_select_default_state(port->dev);
-
- /*
- * Try to enable the clock producer.
- */
- retval = clk_prepare_enable(uap->clk);
- if (retval)
- return retval;
-
- uap->port.uartclk = clk_get_rate(uap->clk);
-
- /* Clear pending error and receive interrupts */
- pl011_write(UART011_OEIS | UART011_BEIS | UART011_PEIS |
- UART011_FEIS | UART011_RTIS | UART011_RXIS,
- uap, REG_ICR);
-
- /*
- * Save interrupts enable mask, and enable RX interrupts in case if
- * the interrupt is used for NMI entry.
- */
- uap->im = pl011_read(uap, REG_IMSC);
- pl011_write(UART011_RTIM | UART011_RXIM, uap, REG_IMSC);
-
- if (dev_get_platdata(uap->port.dev)) {
- struct amba_pl011_data *plat;
-
- plat = dev_get_platdata(uap->port.dev);
- if (plat->init)
- plat->init();
- }
- return 0;
-}
-
static bool pl011_split_lcrh(const struct uart_amba_port *uap)
{
return pl011_reg_to_offset(uap, REG_LCRH_RX) !=
@@ -1707,40 +1741,6 @@ static int pl011_allocate_irq(struct uart_amba_port *uap)
return request_irq(uap->port.irq, pl011_int, IRQF_SHARED, "uart-pl011", uap);
}
-/*
- * Enable interrupts, only timeouts when using DMA
- * if initial RX DMA job failed, start in interrupt mode
- * as well.
- */
-static void pl011_enable_interrupts(struct uart_amba_port *uap)
-{
- unsigned int i;
-
- spin_lock_irq(&uap->port.lock);
-
- /* Clear out any spuriously appearing RX interrupts */
- pl011_write(UART011_RTIS | UART011_RXIS, uap, REG_ICR);
-
- /*
- * RXIS is asserted only when the RX FIFO transitions from below
- * to above the trigger threshold. If the RX FIFO is already
- * full to the threshold this can't happen and RXIS will now be
- * stuck off. Drain the RX FIFO explicitly to fix this:
- */
- for (i = 0; i < uap->fifosize * 2; ++i) {
- if (pl011_read(uap, REG_FR) & UART01x_FR_RXFE)
- break;
-
- pl011_read(uap, REG_DR);
- }
-
- uap->im = UART011_RTIM;
- if (!pl011_dma_rx_running(uap))
- uap->im |= UART011_RXIM;
- pl011_write(uap->im, uap, REG_IMSC);
- spin_unlock_irq(&uap->port.lock);
-}
-
static int pl011_startup(struct uart_port *port)
{
struct uart_amba_port *uap =
--
2.7.4
Powered by blists - more mailing lists