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Message-ID: <1595387397-13110-3-git-send-email-hanks.chen@mediatek.com>
Date:   Wed, 22 Jul 2020 11:09:57 +0800
From:   Hanks Chen <hanks.chen@...iatek.com>
To:     Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Rob Herring <robh+dt@...nel.org>
CC:     YueHaibing <yuehaibing@...wei.com>,
        mtk01761 <wendell.lin@...iatek.com>,
        CC Hwang <cc.hwang@...iatek.com>, <linux-gpio@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <wsd_upstream@...iatek.com>,
        Hanks Chen <hanks.chen@...iatek.com>
Subject: [PATCH v2 2/2] clk: mediatek: remove UART3 clock support

CLK_INFRA_UART3 is a dummy clk interface,
it has no effect on the operation of the read/write instruction.

Signed-off-by: Hanks Chen <hanks.chen@...iatek.com>
---
 drivers/clk/mediatek/clk-mt6779.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt6779.c b/drivers/clk/mediatek/clk-mt6779.c
index 9766cccf5844..75f2235486be 100644
--- a/drivers/clk/mediatek/clk-mt6779.c
+++ b/drivers/clk/mediatek/clk-mt6779.c
@@ -923,8 +923,6 @@ static const struct mtk_gate infra_clks[] = {
 		    "uart_sel", 23),
 	GATE_INFRA0(CLK_INFRA_UART2, "infra_uart2",
 		    "uart_sel", 24),
-	GATE_INFRA0(CLK_INFRA_UART3, "infra_uart3",
-		    "uart_sel", 25),
 	GATE_INFRA0(CLK_INFRA_GCE_26M, "infra_gce_26m",
 		    "axi_sel", 27),
 	GATE_INFRA0(CLK_INFRA_CQ_DMA_FPC, "infra_cqdma_fpc",
-- 
2.18.0

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