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Message-ID: <52f10e30f62b8521fd83525a03ecff94b72d509b.camel@infradead.org>
Date: Thu, 23 Jul 2020 20:07:10 +0100
From: David Woodhouse <dwmw2@...radead.org>
To: davem@...emloft.net
Cc: Frank Wunderlich <frank-w@...lic-files.de>,
Sean Wang <sean.wang@...iatek.com>, andrew@...n.ch,
f.fainelli@...il.com, vivien.didelot@...oirfairelinux.com,
Mark-MC.Lee@...iatek.com, john@...ozen.org,
Landen.Chao@...iatek.com, steven.liu@...iatek.com,
netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
René van Dorst <opensource@...rst.com>,
linux-mediatek <linux-mediatek@...ts.infradead.org>
Subject: [PATCH] net: ethernet: mtk_eth_soc: Always call
mtk_gmac0_rgmii_adjust() for mt7623
From: René van Dorst <opensource@...rst.com>
Modify mtk_gmac0_rgmii_adjust() so it can always be called.
mtk_gmac0_rgmii_adjust() sets-up the TRGMII clocks.
Signed-off-by: René van Dorst <opensource@...rst.com>
Signed-off-By: David Woodhouse <dwmw2@...radead.org>
Tested-by: Frank Wunderlich <frank-w@...lic-files.de>
---
On Mon, 2020-04-06 at 15:25 +0200, Frank Wunderlich wrote:
> have tested these 2 and additional rene's 3rd Patch on my tree [1]
> on BPi-R2, no problem with trgmii yet (multiple power-cycle+reboots).
> I had issues with current 5.6.0 version, so imho these should go
> also into 5.6.y
Here's that third patch of which Frank speaks. I don't see it submitted
yet, and I found I needed it on 5.4 too for the Ethernet to be
functional.
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 19 ++++++++++++++-----
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index b5408c5b954a..f89f225ab144 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -171,11 +171,21 @@ static int mt7621_gmac0_rgmii_adjust(struct mtk_eth *eth,
return 0;
}
-static void mtk_gmac0_rgmii_adjust(struct mtk_eth *eth, int speed)
+static void mtk_gmac0_rgmii_adjust(struct mtk_eth *eth,
+ phy_interface_t interface, int speed)
{
u32 val;
int ret;
+ if (interface == PHY_INTERFACE_MODE_TRGMII) {
+ mtk_w32(eth, TRGMII_MODE, INTF_MODE);
+ val = 500000000;
+ ret = clk_set_rate(eth->clks[MTK_CLK_TRGPLL], val);
+ if (ret)
+ dev_err(eth->dev, "Failed to set trgmii pll: %d\n", ret);
+ return;
+ }
+
val = (speed == SPEED_1000) ?
INTF_MODE_RGMII_1000 : INTF_MODE_RGMII_10_100;
mtk_w32(eth, val, INTF_MODE);
@@ -262,10 +272,9 @@ static void mtk_mac_config(struct phylink_config *config, unsigned int mode,
state->interface))
goto err_phy;
} else {
- if (state->interface !=
- PHY_INTERFACE_MODE_TRGMII)
- mtk_gmac0_rgmii_adjust(mac->hw,
- state->speed);
+ mtk_gmac0_rgmii_adjust(mac->hw,
+ state->interface,
+ state->speed);
/* mt7623_pad_clk_setup */
for (i = 0 ; i < NUM_TRGMII_CTRL; i++)
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