linux-kernel - [tip: timers/core] ARM: dts: at91: sama5d2: add TCB GCLK

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Message-ID: <159553138590.4006.3759668982230902432.tip-bot2@tip-bot2>
Date:   Thu, 23 Jul 2020 19:09:45 -0000
From:   "tip-bot2 for Alexandre Belloni" <tip-bot2@...utronix.de>
To:     linux-tip-commits@...r.kernel.org
Cc:     Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        x86 <x86@...nel.org>, LKML <linux-kernel@...r.kernel.org>
Subject: [tip: timers/core] ARM: dts: at91: sama5d2: add TCB GCLK

The following commit has been merged into the timers/core branch of tip:

Commit-ID:     44f6fa431bbd087083fca437d0348edd4b09e3c2
Gitweb:        https://git.kernel.org/tip/44f6fa431bbd087083fca437d0348edd4b09e3c2
Author:        Alexandre Belloni <alexandre.belloni@...tlin.com>
AuthorDate:    Sat, 11 Jul 2020 01:08:07 +02:00
Committer:     Daniel Lezcano <daniel.lezcano@...aro.org>
CommitterDate: Sat, 11 Jul 2020 18:57:03 +02:00

ARM: dts: at91: sama5d2: add TCB GCLK

The sama5d2 tcbs take an extra input clock, their gclk.

Signed-off-by: Alexandre Belloni <alexandre.belloni@...tlin.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>
Link: https://lore.kernel.org/r/20200710230813.1005150-4-alexandre.belloni@bootlin.com
---
 arch/arm/boot/dts/sama5d2.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index ab550d6..996143e 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -499,23 +499,23 @@
 			};
 
 			tcb0: timer@...0c000 {
-				compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
+				compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
 				#address-cells = <1>;
 				#size-cells = <0>;
 				reg = <0xf800c000 0x100>;
 				interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
-				clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&clk32k>;
-				clock-names = "t0_clk", "slow_clk";
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&pmc PMC_TYPE_GCK 35>, <&clk32k>;
+				clock-names = "t0_clk", "gclk", "slow_clk";
 			};
 
 			tcb1: timer@...10000 {
-				compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
+				compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
 				#address-cells = <1>;
 				#size-cells = <0>;
 				reg = <0xf8010000 0x100>;
 				interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
-				clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&clk32k>;
-				clock-names = "t0_clk", "slow_clk";
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&pmc PMC_TYPE_GCK 36>, <&clk32k>;
+				clock-names = "t0_clk", "gclk", "slow_clk";
 			};
 
 			hsmc: hsmc@...14000 {