linux-kernel - Re: [PATCH v2 05/18] clk: at91: sam9x60-pll: check fcore against ranges

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Message-ID: <159558245915.3847286.9624522528843403626@swboyd.mtv.corp.google.com>
Date:   Fri, 24 Jul 2020 02:20:59 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Claudiu Beznea <claudiu.beznea@...rochip.com>,
        alexandre.belloni@...tlin.com, ludovic.desroches@...rochip.com,
        mturquette@...libre.com, nicolas.ferre@...rochip.com
Cc:     bbrezillon@...nel.org, linux-kernel@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        Claudiu Beznea <claudiu.beznea@...rochip.com>
Subject: Re: [PATCH v2 05/18] clk: at91: sam9x60-pll: check fcore against ranges

Quoting Claudiu Beznea (2020-07-22 00:38:13)
> According to datasheet the range of 600-1200MHz is for the
> frequency generated by the fractional part of the PLL (namely
> Fcorepllck according to datasheet). With this in mind the output
> range of the PLL itself (fractional + div), taking into account
> that the divider is 8 bits wide, is 600/256-1200Hz=2.3-1200MHz.
> 
> Fixes: a436c2a447e59 ("clk: at91: add sam9x60 PLL driver")
> Signed-off-by: Claudiu Beznea <claudiu.beznea@...rochip.com>
> ---

Applied to clk-next