linux-kernel - [PATCH v4 3/6] arm64: dts: sparx5: Add SPI controller and associated mmio-mux

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Date:   Fri, 24 Jul 2020 13:14:01 +0200
From:   Lars Povlsen <lars.povlsen@...rochip.com>
To:     Mark Brown <broonie@...nel.org>, Peter Rosin <peda@...ntia.se>
CC:     Lars Povlsen <lars.povlsen@...rochip.com>,
        Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com>,
        <linux-spi@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        Serge Semin <fancer.lancer@...il.com>,
        Serge Semin <Sergey.Semin@...kalelectronics.ru>
Subject: [PATCH v4 3/6] arm64: dts: sparx5: Add SPI controller and associated mmio-mux

This adds a SPI controller to the Microchip Sparx5 SoC, as well as the
mmio-mux that is required to select the right SPI interface for a
given SPI device.

Signed-off-by: Lars Povlsen <lars.povlsen@...rochip.com>
---
 arch/arm64/boot/dts/microchip/sparx5.dtsi | 27 ++++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi
index 7e811e24f0e99..2169746703dfb 100644
--- a/arch/arm64/boot/dts/microchip/sparx5.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi
@@ -14,6 +14,7 @@ / {
 	#size-cells = <1>;
 
 	aliases {
+		spi0 = &spi0;
 		serial0 = &uart0;
 		serial1 = &uart1;
 	};
@@ -119,8 +120,19 @@ gic: interrupt-controller@...300000 {
 		};
 
 		cpu_ctrl: syscon@...000000 {
-			compatible = "microchip,sparx5-cpu-syscon", "syscon";
+			compatible = "microchip,sparx5-cpu-syscon", "syscon",
+				     "simple-mfd";
 			reg = <0x6 0x00000000 0xd0>;
+			mux: mux-controller {
+				compatible = "mmio-mux";
+				#mux-control-cells = <0>;
+				/*
+				 * SI_OWNER and SI2_OWNER in GENERAL_CTRL
+				 * SPI:  value 9 - (SIMC,SIBM) = 0b1001
+				 * SPI2: value 6 - (SIBM,SIMC) = 0b0110
+				 */
+				mux-reg-masks = <0x88 0xf0>;
+			};
 		};
 
 		reset@...010008 {
@@ -155,6 +167,19 @@ uart1: serial@...102000 {
 			status = "disabled";
 		};
 
+		spi0: spi@...104000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "microchip,sparx5-spi";
+			reg = <0x6 0x00104000 0x40>;
+			num-cs = <16>;
+			reg-io-width = <4>;
+			reg-shift = <2>;
+			clocks = <&ahb_clk>;
+			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
 		timer1: timer@...105000 {
 			compatible = "snps,dw-apb-timer";
 			reg = <0x6 0x00105000 0x1000>;
-- 
2.27.0