linux-kernel - Re: [PATCH v2] irqchip/gic-v4.1: Ensure accessing the correct RD when writing INVALLR

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Date:   Sat, 25 Jul 2020 15:23:35 +0100
From:   Marc Zyngier <maz@...nel.org>
To:     Jason Cooper <jason@...edaemon.net>,
        Alexandre Torgue <alexandre.torgue@...com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Zenghui Yu <yuzenghui@...wei.com>, linux-kernel@...r.kernel.org
Cc:     linux-gpio@...r.kernel.org, marex@...x.de,
        linux-stm32@...md-mailman.stormreply.com,
        linux-arm-kernel@...ts.infradead.org, stable@...r.kernel.org,
        wanghaibin.wang@...wei.com
Subject: Re: [PATCH v2] irqchip/gic-v4.1: Ensure accessing the correct RD when writing INVALLR

On Mon, 20 Jul 2020 17:23:28 +0800, Zenghui Yu wrote:
> The GICv4.1 spec tells us that it's CONSTRAINED UNPREDICTABLE to issue a
> register-based invalidation operation for a vPEID not mapped to that RD,
> or another RD within the same CommonLPIAff group.
> 
> To follow this rule, commit f3a059219bc7 ("irqchip/gic-v4.1: Ensure mutual
> exclusion between vPE affinity change and RD access") tried to address the
> race between the RD accesses and the vPE affinity change, but somehow
> forgot to take GICR_INVALLR into account. Let's take the vpe_lock before
> evaluating vpe->col_idx to fix it.

Applied to irq/irqchip-5.9, thanks!

[1/1] irqchip/gic-v4.1: Ensure accessing the correct RD when writing INVALLR
      commit: fdccf1d9d10395abfe082f50694f374997c6e101

Cheers,

	M.
-- 
Without deviation from the norm, progress is not possible.