linux-kernel - Re: [RFC PATCH 1/9] pci_ids: Add class code and extended capability for RCEC

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Message-ID: <4B3D13E2-4512-4CDE-A853-A4DB96B8258D@intel.com>
Date:   Mon, 27 Jul 2020 08:22:33 -0700
From:   "Sean V Kelley" <sean.v.kelley@...el.com>
To:     "Jonathan Cameron" <Jonathan.Cameron@...wei.com>
Cc:     bhelgaas@...gle.com, rjw@...ysocki.net,
        "Raj, Ashok" <ashok.raj@...el.com>, tony.luck@...el.com,
        sathyanarayanan.kuppuswamy@...ux.intel.com,
        linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
        "Qiuxu Zhuo" <qiuxu.zhuo@...el.com>
Subject: Re: [RFC PATCH 1/9] pci_ids: Add class code and extended capability
 for RCEC

On 27 Jul 2020, at 3:21, Jonathan Cameron wrote:

> On Mon, 27 Jul 2020 11:00:10 +0100
> Jonathan Cameron <Jonathan.Cameron@...wei.com> wrote:
>
>> On Fri, 24 Jul 2020 10:22:15 -0700
>> Sean V Kelley <sean.v.kelley@...el.com> wrote:
>>
>>> From: Qiuxu Zhuo <qiuxu.zhuo@...el.com>
>>>
>>> A PCIe Root Complex Event Collector(RCEC) has the base class 0x08,
>>> sub-class 0x07, and programming interface 0x00. Add the class code
>>> 0x0807 to identify RCEC devices and add the defines for the RCEC
>>> Endpoint Association Extended Capability.
>>>
>>> See PCI Express Base Specification, version 5.0-1, section "1.3.4
>>> Root Complex Event Collector" and section "7.9.10 Root Complex
>>> Event Collector Endpoint Association Extended Capability"
>>
>> Add a reference to the document
>> "PCI Code and ID Assignment Specification"
>> for the class number.
>
> Actually probably no need. I'd somehow managed to fail to notice the
> class code is also given in section 1.3.4 of the main spec.

Okay, will leave as is.

Thanks,

Sean

>
>>
>> From the change log on latest version seems like it's been there 
>> since
>> version 1.4.
>>
>> There is a worrying note (bottom of page 16 of 1.12 version of that 
>> docs)
>> in there that says some older specs used 0x0806 for RCECs and that we
>> should use the port type field to actually check if we have one.
>>
>> Hopefully we won't encounter any of those in the wild.
>>
>> Otherwise, it's exactly what the spec says.
>> We could bike shed on naming choices, but the ones you have seem 
>> clear enough
>> to me.
>>
>> FWIW
>> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>
>>
>>
>> Jonathan
>>>
>>> Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@...el.com>
>>> ---
>>>  include/linux/pci_ids.h       | 1 +
>>>  include/uapi/linux/pci_regs.h | 7 +++++++
>>>  2 files changed, 8 insertions(+)
>>>
>>> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
>>> index 0ad57693f392..de8dff1fb176 100644
>>> --- a/include/linux/pci_ids.h
>>> +++ b/include/linux/pci_ids.h
>>> @@ -81,6 +81,7 @@
>>>  #define PCI_CLASS_SYSTEM_RTC		0x0803
>>>  #define PCI_CLASS_SYSTEM_PCI_HOTPLUG	0x0804
>>>  #define PCI_CLASS_SYSTEM_SDHCI		0x0805
>>> +#define PCI_CLASS_SYSTEM_RCEC		0x0807
>>>  #define PCI_CLASS_SYSTEM_OTHER		0x0880
>>>
>>>  #define PCI_BASE_CLASS_INPUT		0x09
>>> diff --git a/include/uapi/linux/pci_regs.h 
>>> b/include/uapi/linux/pci_regs.h
>>> index f9701410d3b5..f335f65f65d6 100644
>>> --- a/include/uapi/linux/pci_regs.h
>>> +++ b/include/uapi/linux/pci_regs.h
>>> @@ -828,6 +828,13 @@
>>>  #define  PCI_PWR_CAP_BUDGET(x)	((x) & 1)	/* Included in system 
>>> budget */
>>>  #define PCI_EXT_CAP_PWR_SIZEOF	16
>>>
>>> +/* Root Complex Event Collector Endpoint Association  */
>>> +#define PCI_RCEC_RCIEP_BITMAP	4	/* Associated Bitmap for RCiEPs */
>>> +#define PCI_RCEC_BUSN		8	/* RCEC Associated Bus Numbers */
>>> +#define  PCI_RCEC_BUSN_REG_VER	0x02	/* Least capability version 
>>> that BUSN present */
>>> +#define  PCI_RCEC_BUSN_NEXT(x)	(((x) >> 8) & 0xff)
>>> +#define  PCI_RCEC_BUSN_LAST(x)	(((x) >> 16) & 0xff)
>>> +
>>>  /* Vendor-Specific (VSEC, PCI_EXT_CAP_ID_VNDR) */
>>>  #define PCI_VNDR_HEADER		4	/* Vendor-Specific Header */
>>>  #define  PCI_VNDR_HEADER_ID(x)	((x) & 0xffff)
>>