linux-kernel - Re: [Patch v1 2/4] dma: tegra: Adding Tegra GPC DMA controller driver

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Date:   Mon, 27 Jul 2020 14:37:11 +0530
From:   Vinod Koul <vkoul@...nel.org>
To:     Rajesh Gumasta <rgumasta@...dia.com>
Cc:     ldewangan@...dia.com, jonathanh@...dia.com,
        dan.j.williams@...el.com, thierry.reding@...il.com,
        p.zabel@...gutronix.de, dmaengine@...r.kernel.org,
        linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org,
        kyarlagadda@...dia.com, Pavan Kunapuli <pkunapuli@...dia.com>
Subject: Re: [Patch v1 2/4] dma: tegra: Adding Tegra GPC DMA controller driver

On 20-07-20, 12:04, Rajesh Gumasta wrote:
> v4 changes: Removed pending dma desc list and other unused
> data structures
> 
> v3 changes: Removed free list for dma_desc and sg

This is v1 patch and we have v3/v4 stuff! Anyway this can go after the
marker succeeding sob line or cover!

> 
> Adding GPC DMA controller driver for Tegra186 and Tegra194. The driver
> supports dma transfers between memory to memory, IO to memory and
> memory to IO.

This is dmaengine subsystem, so please tag to appropriately

> +/* MMIO sequence register */
> +#define TEGRA_GPCDMA_CHAN_MMIOSEQ		0x01c
> +#define TEGRA_GPCDMA_MMIOSEQ_DBL_BUF		BIT(31)
> +#define TEGRA_GPCDMA_MMIOSEQ_BUS_WIDTH_8	(0 << 28)
> +#define TEGRA_GPCDMA_MMIOSEQ_BUS_WIDTH_16	(1 << 28)
> +#define TEGRA_GPCDMA_MMIOSEQ_BUS_WIDTH_32	(2 << 28)
> +#define TEGRA_GPCDMA_MMIOSEQ_BUS_WIDTH_64	(3 << 28)
> +#define TEGRA_GPCDMA_MMIOSEQ_BUS_WIDTH_128	(4 << 28)

GENMASK for these please

> +static int tegra_dma_slave_config(struct dma_chan *dc,
> +		struct dma_slave_config *sconfig)
> +{
> +	struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
> +
> +	if (!list_empty(&tdc->pending_sg_req)) {
> +		dev_err(tdc2dev(tdc), "Configuration not allowed\n");

why is that?

Also run checkpatch --strict on this before sending.

Thanks
-- 
~Vinod