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Message-Id: <20200728153708.1296374-1-jiaxun.yang@flygoat.com>
Date: Tue, 28 Jul 2020 23:36:54 +0800
From: Jiaxun Yang <jiaxun.yang@...goat.com>
To: linux-mips@...r.kernel.org
Cc: Jiaxun Yang <jiaxun.yang@...goat.com>,
Rob Herring <robh+dt@...nel.org>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Huacai Chen <chenhc@...ote.com>,
Frank Rowand <frowand.list@...il.com>,
Paul Burton <paulburton@...nel.org>,
Nick Desaulniers <ndesaulniers@...gle.com>,
Nathan Chancellor <natechancellor@...il.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH v4 0/5] MIPS: Loongson64: Process ISA Node in DeviceTree
Hi,
This series convert reservation of Loongson64 Logic PIO into DeviceTree based
method.
It can be used to replace Huacai's
"MIPS: Loongson64: Reserve legacy MMIO space according to bridge type".
Thanks.
v2:
- Address Rob and Huacai's review comments.
v3:
- Address Rob, Thomas's review comments.
v4:
- Fix typo & grammar issue according to Xuerui's suggestion.
Jiaxun Yang (5):
of_address: Add bus type match for pci ranges parser
MIPS: Loongson64: Process ISA Node in DeviceTree
MIPS: Loongson64: Enlarge IO_SPACE_LIMIT
MIPS: Loongson64: DTS: Fix ISA and PCI I/O ranges for RS780E PCH
MIPS: Loongson64: Add ISA node for LS7A PCH
arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 7 ++
arch/mips/boot/dts/loongson/rs780e-pch.dtsi | 4 +-
arch/mips/include/asm/io.h | 2 -
arch/mips/include/asm/mach-generic/spaces.h | 4 +
.../mips/include/asm/mach-loongson64/spaces.h | 3 +-
arch/mips/loongson64/init.c | 87 +++++++++++++------
drivers/of/address.c | 29 ++++---
include/linux/of_address.h | 4 +
8 files changed, 97 insertions(+), 43 deletions(-)
--
2.28.0.rc1
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