linux-kernel - [PATCH 6/6] arch: x86: Reclaim TIF

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Message-Id: <20200728202229.1195682-7-krisman@collabora.com>
Date:   Tue, 28 Jul 2020 16:22:29 -0400
From:   Gabriel Krisman Bertazi <krisman@...labora.com>
To:     luto@...nel.org, tglx@...utronix.de
Cc:     keescook@...omium.org, x86@...nel.org,
        linux-kernel@...r.kernel.org,
        Gabriel Krisman Bertazi <krisman@...labora.com>,
        kernel@...labora.com
Subject: [PATCH 6/6] arch: x86: Reclaim TIF_X32 flag

Dropping this as a TIF flag is interesting given the pressure over x86
remaining x86 flags, plus considering the current common entry code,
reducing arch-specific flags is a good thing.

Notice that no path really relies on TIF_X32 as part of a critical path,
therefore the cost of checking another field in thread_info shouldn't be
a problem.

Signed-off-by: Gabriel Krisman Bertazi <krisman@...labora.com>
---
 arch/x86/events/core.c             | 2 +-
 arch/x86/include/asm/thread_info.h | 4 +---
 arch/x86/kernel/process_64.c       | 3 ---
 3 files changed, 2 insertions(+), 7 deletions(-)

diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 42dff74c6197..389a840e2211 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -2574,7 +2574,7 @@ perf_callchain_user(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs
  *   IA32 - Where we need to look at GDT/LDT segment descriptor tables
  *          to figure out what the 32bit base address is.
  *
- *    X32 - has TIF_X32 set, but is running in x86_64
+ *    X32 - has PSABI_X32 set, but is running in x86_64
  *
  * X86_64 - CS,DS,SS,ES are all zero based.
  */
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h
index aa7d27054a8a..3059af355cdb 100644
--- a/arch/x86/include/asm/thread_info.h
+++ b/arch/x86/include/asm/thread_info.h
@@ -108,7 +108,6 @@ struct thread_info {
 #define TIF_LAZY_MMU_UPDATES	27	/* task is updating the mmu lazily */
 #define TIF_SYSCALL_TRACEPOINT	28	/* syscall tracepoint instrumentation */
 #define TIF_ADDR32		29	/* 32-bit address space on 64 bits */
-#define TIF_X32			30	/* 32-bit native x86-64 binary */
 #define TIF_FSCHECK		31	/* Check FS is USER_DS on return */
 
 #define _TIF_SYSCALL_TRACE	(1 << TIF_SYSCALL_TRACE)
@@ -136,7 +135,6 @@ struct thread_info {
 #define _TIF_LAZY_MMU_UPDATES	(1 << TIF_LAZY_MMU_UPDATES)
 #define _TIF_SYSCALL_TRACEPOINT	(1 << TIF_SYSCALL_TRACEPOINT)
 #define _TIF_ADDR32		(1 << TIF_ADDR32)
-#define _TIF_X32		(1 << TIF_X32)
 #define _TIF_FSCHECK		(1 << TIF_FSCHECK)
 
 /* flags to check in __switch_to() */
@@ -244,6 +242,6 @@ extern void arch_setup_new_exec(void);
 #endif	/* !__ASSEMBLY__ */
 
 #define TASK_IA32(tsk) (task_thread_info(tsk)->psabi == PSABI_IA32)
-#define TASK_X32(tsk) test_tsk_thread_flag(tsk, TIF_X32)
+#define TASK_X32(tsk) (task_thread_info(tsk)->psabi == PSABI_X32)
 
 #endif /* _ASM_X86_THREAD_INFO_H */
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 75059c9de829..d9a72e186db6 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -534,7 +534,6 @@ void set_personality_64bit(void)
 	/* Make sure to be in 64bit mode */
 	current_thread_info()->psabi = PSABI_IA64;
 	clear_thread_flag(TIF_ADDR32);
-	clear_thread_flag(TIF_X32);
 	/* Pretend that this comes from a 64bit execve */
 	task_pt_regs(current)->orig_ax = __NR_execve;
 	current_thread_info()->status &= ~TS_COMPAT;
@@ -554,7 +553,6 @@ static void __set_personality_x32(void)
 {
 #ifdef CONFIG_X86_X32
 	current_thread_info()->psabi = PSABI_X32;
-	set_thread_flag(TIF_X32);
 	if (current->mm)
 		current->mm->context.ia32_compat = PSABI_X32;
 	current->personality &= ~READ_IMPLIES_EXEC;
@@ -575,7 +573,6 @@ static void __set_personality_ia32(void)
 {
 #ifdef CONFIG_IA32_EMULATION
 	current_thread_info()->psabi = PSABI_IA32;
-	clear_thread_flag(TIF_X32);
 	if (current->mm)
 		current->mm->context.ia32_compat = PSABI_IA32;
 	current->personality |= force_personality32;
-- 
2.27.0