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Message-ID: <202007281310.eciiVHmF%lkp@intel.com>
Date: Tue, 28 Jul 2020 13:10:13 +0800
From: kernel test robot <lkp@...el.com>
To: Corentin Labbe <clabbe.montjoie@...il.com>
Cc: kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
Herbert Xu <herbert@...dor.apana.org.au>
Subject: drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c:123:39: sparse:
sparse: restricted __le32 degrades to integer
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 92ed301919932f777713b9172e525674157e983d
commit: 93c7f4d357de68f1e3a998b2fc775466d75c4c07 crypto: sun8i-ce - enable working on big endian
date: 8 months ago
config: arm64-randconfig-s031-20200728 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.2-94-geb6779f6-dirty
git checkout 93c7f4d357de68f1e3a998b2fc775466d75c4c07
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c:123:39: sparse: sparse: restricted __le32 degrades to integer
vim +123 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
06f751b613296c Corentin Labbe 2019-10-23 109
06f751b613296c Corentin Labbe 2019-10-23 110 mutex_lock(&ce->mlock);
06f751b613296c Corentin Labbe 2019-10-23 111
06f751b613296c Corentin Labbe 2019-10-23 112 v = readl(ce->base + CE_ICR);
06f751b613296c Corentin Labbe 2019-10-23 113 v |= 1 << flow;
06f751b613296c Corentin Labbe 2019-10-23 114 writel(v, ce->base + CE_ICR);
06f751b613296c Corentin Labbe 2019-10-23 115
06f751b613296c Corentin Labbe 2019-10-23 116 reinit_completion(&ce->chanlist[flow].complete);
06f751b613296c Corentin Labbe 2019-10-23 117 writel(ce->chanlist[flow].t_phy, ce->base + CE_TDQ);
06f751b613296c Corentin Labbe 2019-10-23 118
06f751b613296c Corentin Labbe 2019-10-23 119 ce->chanlist[flow].status = 0;
06f751b613296c Corentin Labbe 2019-10-23 120 /* Be sure all data is written before enabling the task */
06f751b613296c Corentin Labbe 2019-10-23 121 wmb();
06f751b613296c Corentin Labbe 2019-10-23 122
06f751b613296c Corentin Labbe 2019-10-23 @123 v = 1 | (ce->chanlist[flow].tl->t_common_ctl & 0x7F) << 8;
06f751b613296c Corentin Labbe 2019-10-23 124 writel(v, ce->base + CE_TLR);
06f751b613296c Corentin Labbe 2019-10-23 125 mutex_unlock(&ce->mlock);
06f751b613296c Corentin Labbe 2019-10-23 126
06f751b613296c Corentin Labbe 2019-10-23 127 wait_for_completion_interruptible_timeout(&ce->chanlist[flow].complete,
06f751b613296c Corentin Labbe 2019-10-23 128 msecs_to_jiffies(ce->chanlist[flow].timeout));
06f751b613296c Corentin Labbe 2019-10-23 129
06f751b613296c Corentin Labbe 2019-10-23 130 if (ce->chanlist[flow].status == 0) {
06f751b613296c Corentin Labbe 2019-10-23 131 dev_err(ce->dev, "DMA timeout for %s\n", name);
06f751b613296c Corentin Labbe 2019-10-23 132 err = -EFAULT;
06f751b613296c Corentin Labbe 2019-10-23 133 }
06f751b613296c Corentin Labbe 2019-10-23 134 /* No need to lock for this read, the channel is locked so
06f751b613296c Corentin Labbe 2019-10-23 135 * nothing could modify the error value for this channel
06f751b613296c Corentin Labbe 2019-10-23 136 */
06f751b613296c Corentin Labbe 2019-10-23 137 v = readl(ce->base + CE_ESR);
06f751b613296c Corentin Labbe 2019-10-23 138 if (v) {
06f751b613296c Corentin Labbe 2019-10-23 139 v >>= (flow * 4);
06f751b613296c Corentin Labbe 2019-10-23 140 v &= 0xFF;
06f751b613296c Corentin Labbe 2019-10-23 141 if (v) {
06f751b613296c Corentin Labbe 2019-10-23 142 dev_err(ce->dev, "CE ERROR: %x for flow %x\n", v, flow);
06f751b613296c Corentin Labbe 2019-10-23 143 err = -EFAULT;
06f751b613296c Corentin Labbe 2019-10-23 144 }
06f751b613296c Corentin Labbe 2019-10-23 145 if (v & CE_ERR_ALGO_NOTSUP)
06f751b613296c Corentin Labbe 2019-10-23 146 dev_err(ce->dev, "CE ERROR: algorithm not supported\n");
06f751b613296c Corentin Labbe 2019-10-23 147 if (v & CE_ERR_DATALEN)
06f751b613296c Corentin Labbe 2019-10-23 148 dev_err(ce->dev, "CE ERROR: data length error\n");
06f751b613296c Corentin Labbe 2019-10-23 149 if (v & CE_ERR_KEYSRAM)
06f751b613296c Corentin Labbe 2019-10-23 150 dev_err(ce->dev, "CE ERROR: keysram access error for AES\n");
06f751b613296c Corentin Labbe 2019-10-23 151 if (v & CE_ERR_ADDR_INVALID)
06f751b613296c Corentin Labbe 2019-10-23 152 dev_err(ce->dev, "CE ERROR: address invalid\n");
06f751b613296c Corentin Labbe 2019-10-23 153 }
06f751b613296c Corentin Labbe 2019-10-23 154
06f751b613296c Corentin Labbe 2019-10-23 155 return err;
06f751b613296c Corentin Labbe 2019-10-23 156 }
06f751b613296c Corentin Labbe 2019-10-23 157
:::::: The code at line 123 was first introduced by commit
:::::: 06f751b613296cc34b86fc83fccaf30d646eb8bc crypto: allwinner - Add sun8i-ce Crypto Engine
:::::: TO: Corentin Labbe <clabbe.montjoie@...il.com>
:::::: CC: Herbert Xu <herbert@...dor.apana.org.au>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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