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Message-Id: <20200728120049.90632-6-konradybcio@gmail.com>
Date: Tue, 28 Jul 2020 14:00:44 +0200
From: Konrad Dybcio <konradybcio@...il.com>
To: konradybcio@...il.com
Cc: lauren.kelly@....com, Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org
Subject: [PATCH 5/9] arm64: dts: qcom: msm8992: Add USB support
This is a very basic dwc3 configuration (no PHYs yet),
but it works.
Signed-off-by: Konrad Dybcio <konradybcio@...il.com>
---
arch/arm64/boot/dts/qcom/msm8992.dtsi | 31 +++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi b/arch/arm64/boot/dts/qcom/msm8992.dtsi
index c7dc81311f6a..c9502fcf5d70 100644
--- a/arch/arm64/boot/dts/qcom/msm8992.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi
@@ -242,6 +242,37 @@ frame@...28000 {
};
};
+ usb3: usb@...f8800 {
+ compatible = "qcom,msm8996-dwc3", "qcom,dwc3";
+ reg = <0xf92f8800 0x400>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ clocks = <&gcc GCC_USB30_MASTER_CLK>,
+ <&gcc GCC_SYS_NOC_USB3_AXI_CLK>,
+ <&gcc GCC_USB30_SLEEP_CLK>,
+ <&gcc GCC_USB30_MOCK_UTMI_CLK>;
+ clock-names = "core", "iface", "sleep", "mock_utmi", "ref", "xo";
+
+ assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>,
+ <&gcc GCC_USB30_MASTER_CLK>;
+ assigned-clock-rates = <19200000>, <120000000>;
+
+ power-domains = <&gcc USB30_GDSC>;
+ qcom,select-utmi-as-pipe-clk;
+
+ dwc3@...00000 {
+ compatible = "snps,dwc3";
+ reg = <0xf9200000 0xcc00>;
+ interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_enblslpm_quirk;
+ maximum-speed = "high-speed";
+ dr_mode = "peripheral";
+ };
+ };
+
sdhc_1: sdhci@...24900 {
compatible = "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
--
2.27.0
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