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Message-ID: <20200728123846.GC4343@leoy-ThinkPad-X240s>
Date: Tue, 28 Jul 2020 20:38:46 +0800
From: Leo Yan <leo.yan@...aro.org>
To: Arnaldo Carvalho de Melo <acme@...nel.org>
Cc: Mathieu Poirier <mathieu.poirier@...aro.org>,
Wei Li <liwei391@...wei.com>,
Suzuki K Poulose <suzuki.poulose@....com>,
Mike Leach <mike.leach@...aro.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...hat.com>,
Namhyung Kim <namhyung@...nel.org>,
Kim Phillips <kim.phillips@....com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>, guohanjun@...wei.com
Subject: Re: [PATCH v2 2/2] perf tools: ARM SPE code cleanup
Hi Arnaldo,
On Tue, Jul 28, 2020 at 09:02:20AM -0300, Arnaldo Carvalho de Melo wrote:
> Em Mon, Jul 27, 2020 at 02:34:36PM -0600, Mathieu Poirier escreveu:
> > On Fri, Jul 24, 2020 at 03:11:11PM +0800, Wei Li wrote:
> > > - Firstly, the function auxtrace_record__init() will be invoked only
> > > once, the variable "arm_spe_pmus" will not be used afterwards, thus
> > > we don't need to check "arm_spe_pmus" is NULL or not;
> > > - Another reason is, even though SPE is micro-architecture dependent,
> > > but so far it only supports "statistical-profiling-extension-v1" and
> > > we have no chance to use multiple SPE's PMU events in Perf command.
> >
> > I find the above changelog somewhat out of touch with the patch itself. The
> > only thing that is happening here is the removal of a useless check and a fix
> > for a memory leak.
>
> Humm, I think the original intent of that code was to cache the results
> of find_all_arm_spe_pmus(), as the variable it is assigned to is static.
>
> So not a leak, as there was that static reference to it to reuse it
> later, but that is strange in a function named "__init()" which usually
> is called only once, anyway, so I think that the paragraph with
> "Firstly" is kinda ok, but confusing, I think it should read:
>
> - auxtrace_record__init() is called only once, so there is no point in
> using a static variable to cache the results of
> find_all_arm_spe_pmus(), make it local and free the results after use.
>
> The second paragraph is SPE specific, so I'm not qualified to judge on
> it.
>
> I'm replacing the first paragraph with the version I wrote and keep it
> in my local branch, please holler if you think I misunderstood.
Thanks a lot for this. These two paragraphs were coming from reviewing
and comments, but I think your rephrasing is very sufficient to describe
what this patch is doing :)
Thanks,
Leo
> > Once again whether Arnaldo wants to make the changes by hand or not you may have
> > to resubmit.
> >
> > Reviewed-by: Mathieu Poirier <mathieu.poirier@...aro.org>
> >
> > >
> > > So remove the useless check code to make it clear.
> > >
> > > Signed-off-by: Wei Li <liwei391@...wei.com>
> > > ---
> > > tools/perf/arch/arm/util/auxtrace.c | 9 ++++-----
> > > 1 file changed, 4 insertions(+), 5 deletions(-)
> > >
> > > diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c
> > > index 28a5d0c18b1d..b187bddbd01a 100644
> > > --- a/tools/perf/arch/arm/util/auxtrace.c
> > > +++ b/tools/perf/arch/arm/util/auxtrace.c
> > > @@ -57,17 +57,15 @@ struct auxtrace_record
> > > struct evsel *evsel;
> > > bool found_etm = false;
> > > struct perf_pmu *found_spe = NULL;
> > > - static struct perf_pmu **arm_spe_pmus = NULL;
> > > - static int nr_spes = 0;
> > > + struct perf_pmu **arm_spe_pmus = NULL;
> > > + int nr_spes = 0;
> > > int i = 0;
> > >
> > > if (!evlist)
> > > return NULL;
> > >
> > > cs_etm_pmu = perf_pmu__find(CORESIGHT_ETM_PMU_NAME);
> > > -
> > > - if (!arm_spe_pmus)
> > > - arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err);
> > > + arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err);
> > >
> > > evlist__for_each_entry(evlist, evsel) {
> > > if (cs_etm_pmu &&
> > > @@ -84,6 +82,7 @@ struct auxtrace_record
> > > }
> > > }
> > > }
> > > + free(arm_spe_pmus);
> > >
> > > if (found_etm && found_spe) {
> > > pr_err("Concurrent ARM Coresight ETM and SPE operation not currently supported\n");
> > > --
> > > 2.17.1
> > >
>
> --
>
> - Arnaldo
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