linux-kernel - Re: [PATCH 2/2] arm64: dts: mt8192: add infracfg

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Message-ID: <b81f1936-caf0-e843-9556-14e3024d6d6f@gmail.com>
Date:   Wed, 29 Jul 2020 09:45:28 +0200
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     Crystal Guo <crystal.guo@...iatek.com>, p.zabel@...gutronix.de,
        robh+dt@...nel.org
Cc:     srv_heupstream@...iatek.com, linux-mediatek@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, seiya.wang@...iatek.com
Subject: Re: [PATCH 2/2] arm64: dts: mt8192: add infracfg_rst node



On 29/07/2020 09:39, Crystal Guo wrote:
> add infracfg_rst node which is for MT8192 platform
> 
> Signed-off-by: Crystal Guo <crystal.guo@...iatek.com>
> ---
>   arch/arm64/boot/dts/mediatek/mt8192.dtsi | 10 +++++++++-
>   1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index b16dbbd..adc6239 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -217,9 +217,17 @@
>   		};
>   
>   		infracfg: infracfg@...01000 {
> -			compatible = "mediatek,mt8192-infracfg", "syscon";
> +			compatible = "mediatek,mt8192-infracfg", "syscon", "simple-mfd";
>   			reg = <0 0x10001000 0 0x1000>;
>   			#clock-cells = <1>;
> +
> +			infracfg_rst: reset-controller {
> +				compatible = "ti,syscon-reset";
> +				#reset-cells = <1>;
> +				ti,reset-bits = <
> +					0x140 15 0x144 15 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* 0: pcie */

You have Texas Instruments hardware inside infracfg? Are you sure?

> +				>;
> +			};
>   		};
>   
>   		pericfg: pericfg@...03000 {
>