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Message-Id: <20200729205144.1.I8556c0b9b6f75bf3121989f5641c33e694fff8d9@changeid>
Date: Wed, 29 Jul 2020 20:52:04 +1000
From: Victor Ding <victording@...gle.com>
To: LKML <linux-kernel@...r.kernel.org>
Cc: Victor Ding <victording@...gle.com>,
Borislav Petkov <bp@...en8.de>,
"H. Peter Anvin" <hpa@...or.com>, Ingo Molnar <mingo@...hat.com>,
Jan Beulich <jbeulich@...e.com>,
Josh Poimboeuf <jpoimboe@...hat.com>,
Kim Phillips <kim.phillips@....com>,
Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>,
"Peter Zijlstra (Intel)" <peterz@...radead.org>,
Sean Christopherson <sean.j.christopherson@...el.com>,
Thomas Gleixner <tglx@...utronix.de>,
Tony Luck <tony.luck@...el.com>,
Vineela Tummalapalli <vineela.tummalapalli@...el.com>,
x86@...nel.org
Subject: [PATCH 1/3] x86/msr-index: sort AMD RAPL MSRs by address
MSRs in the rest of this file are sorted by their addresses; fixing the
two outliers.
No functional changes.
Signed-off-by: Victor Ding <victording@...gle.com>
---
arch/x86/include/asm/msr-index.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index e8370e64a155..c5e92317356e 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -305,8 +305,8 @@
#define MSR_PP1_ENERGY_STATUS 0x00000641
#define MSR_PP1_POLICY 0x00000642
-#define MSR_AMD_PKG_ENERGY_STATUS 0xc001029b
#define MSR_AMD_RAPL_POWER_UNIT 0xc0010299
+#define MSR_AMD_PKG_ENERGY_STATUS 0xc001029b
/* Config TDP MSRs */
#define MSR_CONFIG_TDP_NOMINAL 0x00000648
--
2.28.0.rc0.142.g3c755180ce-goog
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