lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 29 Jul 2020 15:18:02 +0100
From:   Russell King - ARM Linux admin <linux@...linux.org.uk>
To:     Guillaume Tucker <guillaume.tucker@...labora.com>
Cc:     Kukjin Kim <kgene@...nel.org>,
        Krzysztof Kozlowski <krzk@...nel.org>,
        Rob Herring <robh+dt@...nel.org>, kernel@...labora.com,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/3] ARM: l2c: update prefetch bits in L2X0_AUX_CTRL
 using DT value

On Wed, Jul 29, 2020 at 02:47:32PM +0100, Guillaume Tucker wrote:
> The L310_PREFETCH_CTRL register bits 28 and 29 to enable data and
> instruction prefetch respectively can also be accessed via the
> L2X0_AUX_CTRL register.  They appear to be actually wired together in
> hardware between the registers.  Changing them in the prefetch
> register only will get undone when restoring the aux control register
> later on.  For this reason, set these bits in both registers during
> initialisation according to the DT attributes.

How will that happen?

We write the auxiliary control register before the prefetch control
register, so the prefetch control register will take precedence.  See
l2c310_configure() - l2c_configure() writes the auxiliary control
register, and the function writes the prefetch control register later.

I think the real issue is that Exynos has been modifying the prefetch
settings via its machine .aux_mask / .aux_val configuration, and the
opposite is actually true: the prefetch control register values will
overwrite the attempt to modify the auxiliary control values set through
the machine .aux_mask/.aux_val.

> 
> Fixes: ec3bd0e68a67 ("ARM: 8391/1: l2c: add options to overwrite prefetching behavior")
> Signed-off-by: Guillaume Tucker <guillaume.tucker@...labora.com>
> ---
>  arch/arm/mm/cache-l2x0.c | 16 ++++++++++++----
>  1 file changed, 12 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
> index 12c26eb88afb..43d91bfd2360 100644
> --- a/arch/arm/mm/cache-l2x0.c
> +++ b/arch/arm/mm/cache-l2x0.c
> @@ -1249,20 +1249,28 @@ static void __init l2c310_of_parse(const struct device_node *np,
>  
>  	ret = of_property_read_u32(np, "prefetch-data", &val);
>  	if (ret == 0) {
> -		if (val)
> +		if (val) {
>  			prefetch |= L310_PREFETCH_CTRL_DATA_PREFETCH;
> -		else
> +			*aux_val |= L310_PREFETCH_CTRL_DATA_PREFETCH;
> +		} else {
>  			prefetch &= ~L310_PREFETCH_CTRL_DATA_PREFETCH;
> +			*aux_val &= ~L310_PREFETCH_CTRL_DATA_PREFETCH;
> +		}
> +		*aux_mask &= ~L310_PREFETCH_CTRL_DATA_PREFETCH;
>  	} else if (ret != -EINVAL) {
>  		pr_err("L2C-310 OF prefetch-data property value is missing\n");
>  	}
>  
>  	ret = of_property_read_u32(np, "prefetch-instr", &val);
>  	if (ret == 0) {
> -		if (val)
> +		if (val) {
>  			prefetch |= L310_PREFETCH_CTRL_INSTR_PREFETCH;
> -		else
> +			*aux_val |= L310_PREFETCH_CTRL_INSTR_PREFETCH;
> +		} else {
>  			prefetch &= ~L310_PREFETCH_CTRL_INSTR_PREFETCH;
> +			*aux_val &= ~L310_PREFETCH_CTRL_INSTR_PREFETCH;
> +		}
> +		*aux_mask &= ~L310_PREFETCH_CTRL_INSTR_PREFETCH;
>  	} else if (ret != -EINVAL) {
>  		pr_err("L2C-310 OF prefetch-instr property value is missing\n");
>  	}
> -- 
> 2.20.1
> 
> 

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ