linux-kernel - Re: [PATCH v3 3/7] ASoC: sun4i-i2s: Add support for H6 I2S

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Message-ID: <20200729143927.47f5tbuaob4ph3lp@gilmour.lan>
Date:   Wed, 29 Jul 2020 16:39:27 +0200
From:   Maxime Ripard <maxime@...no.tech>
To:     Clément Péron <peron.clem@...il.com>
Cc:     Liam Girdwood <lgirdwood@...il.com>,
        Mark Brown <broonie@...nel.org>,
        Rob Herring <robh+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
        Jaroslav Kysela <perex@...ex.cz>,
        Takashi Iwai <tiwai@...e.com>,
        Linux-ALSA <alsa-devel@...a-project.org>,
        devicetree <devicetree@...r.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        Jernej Skrabec <jernej.skrabec@...l.net>,
        Marcus Cooper <codekipper@...il.com>
Subject: Re: [PATCH v3 3/7] ASoC: sun4i-i2s: Add support for H6 I2S

On Mon, May 04, 2020 at 09:43:05PM +0200, Clément Péron wrote:
> > > H3 boards are quite common in LibreElec community so I think:
> > >  - This fix is only needed in TDM mode
> > >  - Or this fix is not required for the HDMI DAI node (HDMI DAI is a
> > > little bit different compare to other DAI but I think the first guess
> > > is more likely)
> >
> > Given what we know about the A33, I'd be inclined to say the latter. I'd don't
> > have the tools to check anymore, but if you have even a cheap logical analyzer,
> > i2s being pretty slow you can definitely see it.
> 
> Me neither but maybe Marcus will be able to check this.
> Thanks for all these informations.

I finally got my hangs on a logical analyzer and gave it a try.

You'll find the start of the playback on H6's i2s0 attached.

It really looks like the polarity of LRCK is fine though. The first word
is sent with LRCK low, and then high, so we have channel 0 and then
channel 1 which seems to be the proper ordering?

Something that is fairly odd though is that there's a delay of about 8ms
(about 387 LRCK periods) between the time where SCK and LRCK start to
output something, and then when the data starts being output.

However, the signal seems to be dephased and will start being output on
the channel 1, which might lead to the behaviour that is seen? you can
see that on the second screenshot attached.

Maxime

Download attachment "h6-i2s-start-data.png" of type "image/png" (183824 bytes)

Download attachment "i2s-h6.png" of type "image/png" (135413 bytes)

Download attachment "signature.asc" of type "application/pgp-signature" (229 bytes)