linux-kernel - Re: [v2,3/3] watchdog: mt8192: add wdt support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <8774e948-502d-8a83-6e7c-5459497c52a4@gmail.com>
Date:   Thu, 30 Jul 2020 11:03:50 +0200
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     Crystal Guo <crystal.guo@...iatek.com>, linux@...ck-us.net,
        robh+dt@...nel.org
Cc:     srv_heupstream@...iatek.com, linux-mediatek@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-watchdog@...r.kernel.org, seiya.wang@...iatek.com,
        erin.lo@...iatek.com
Subject: Re: [v2,3/3] watchdog: mt8192: add wdt support



On 29/07/2020 12:02, Crystal Guo wrote:
> add driver setting to support mt8192 wdt

Commit message could be better:

"Add support for watchdog device found in MT8192 SoC." for example.

> 
> Signed-off-by: Crystal Guo <crystal.guo@...iatek.com>

Reviewed-by: Matthias Brugger <matthias.bgg@...il.com>

> ---
>   drivers/watchdog/mtk_wdt.c | 6 ++++++
>   1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
> index d6a6393..aef0c2d 100644
> --- a/drivers/watchdog/mtk_wdt.c
> +++ b/drivers/watchdog/mtk_wdt.c
> @@ -11,6 +11,7 @@
>   
>   #include <dt-bindings/reset-controller/mt2712-resets.h>
>   #include <dt-bindings/reset-controller/mt8183-resets.h>
> +#include <dt-bindings/reset-controller/mt8192-resets.h>
>   #include <linux/delay.h>
>   #include <linux/err.h>
>   #include <linux/init.h>
> @@ -76,6 +77,10 @@ struct mtk_wdt_data {
>   	.toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM,
>   };
>   
> +static const struct mtk_wdt_data mt8192_data = {
> +	.toprgu_sw_rst_num = MT8192_TOPRGU_SW_RST_NUM,
> +};
> +
>   static int toprgu_reset_update(struct reset_controller_dev *rcdev,
>   			       unsigned long id, bool assert)
>   {
> @@ -322,6 +327,7 @@ static int mtk_wdt_resume(struct device *dev)
>   	{ .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data },
>   	{ .compatible = "mediatek,mt6589-wdt" },
>   	{ .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
> +	{ .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data },
>   	{ /* sentinel */ }
>   };
>   MODULE_DEVICE_TABLE(of, mtk_wdt_dt_ids);
>