lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <9ab39ee2-d6db-73f5-5914-befd22a9bcfb@st.com>
Date:   Fri, 31 Jul 2020 10:08:12 +0200
From:   Alexandre Torgue <alexandre.torgue@...com>
To:     Ahmad Fatoum <a.fatoum@...gutronix.de>,
        Marcin Sloniewski <marcin.sloniewski@...il.com>,
        <linux-arm-kernel@...ts.infradead.org>
CC:     <robh+dt@...nel.org>, <mcoquelin.stm32@...il.com>,
        <mani@...nel.org>, <sam@...nborg.org>, <linus.walleij@...aro.org>,
        <heiko.stuebner@...obroma-systems.com>, <stephan@...hold.net>,
        <lkundrak@...sk>, <broonie@...nel.org>, <allen.chen@....com.tw>,
        <robh@...nel.org>, <devicetree@...r.kernel.org>,
        <linux-stm32@...md-mailman.stormreply.com>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5 3/3] ARM: dts: stm32: add initial support for
 stm32mp157-odyssey board


...

>> +
>> +&sdmmc2_d47_pins_a {
>> +	pins {
>> +		pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
>> +			 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
>> +			 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
>> +			 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
>> +	};
>> +};
>> +
>> +&sdmmc2_d47_sleep_pins_a {
>> +	pins {
>> +		pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
>> +			 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
>> +			 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
>> +			 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
>> +	};
>> +};
> 
> When I sent out the device trees for the lxa-mc1, Alex wanted
> all pinctrl nodes to be collected in stm32mp15-pinctrl.dtsi.
> 
> @Alex, should this be done here as well?

Hi,

Sorry for the late answer. Yes it has to be defined in 
stm32mp15-pinctrl.dtsi. If at the end there are too much definitions for 
the same pins or group of pins, I'll find a smarter way for pin 
definition, but currently all pin definitions have to be done in 
stm32mp15-pinctrl.dtsi.

cheers
Alex

> 
>> +
>> +&sdmmc2 {
>> +	pinctrl-names = "default", "opendrain", "sleep";
>> +	pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
>> +	pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
>> +	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
>> +	non-removable;
>> +	no-sd;
>> +	no-sdio;
>> +	st,neg-edge;
>> +	bus-width = <8>;
>> +	vmmc-supply = <&v3v3>;
>> +	vqmmc-supply = <&v3v3>;
>> +	mmc-ddr-3_3v;
>> +	status = "okay";
>> +};
>> +
>> diff --git a/arch/arm/boot/dts/stm32mp157c-odyssey.dts b/arch/arm/boot/dts/stm32mp157c-odyssey.dts
>> new file mode 100644
>> index 000000000000..619243807842
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/stm32mp157c-odyssey.dts
>> @@ -0,0 +1,73 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
>> +/*
>> + * Copyright (C) 2020 Marcin Sloniewski <marcin.sloniewski@...il.com>.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "stm32mp157c-odyssey-som.dtsi"
>> +
>> +/ {
>> +	model = "Seeed Studio Odyssey-STM32MP157C Board";
>> +	compatible = "seeed,stm32mp157c-odyssey",
>> +		     "seeed,stm32mp157c-odyssey-som", "st,stm32mp157";
>> +
>> +	aliases {
>> +		ethernet0 = &ethernet0;
>> +		serial0 = &uart4;
>> +	};
>> +
>> +	chosen {
>> +		stdout-path = "serial0:115200n8";
>> +	};
>> +};
>> +
>> +&ethernet0 {
>> +	status = "okay";
>> +	pinctrl-0 = <&ethernet0_rgmii_pins_a>;
>> +	pinctrl-1 = <&ethernet0_rgmii_sleep_pins_a>;
>> +	pinctrl-names = "default", "sleep";
>> +	phy-mode = "rgmii-id";
>> +	max-speed = <1000>;
>> +	phy-handle = <&phy0>;
>> +
>> +	mdio0 {
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +		compatible = "snps,dwmac-mdio";
>> +		phy0: ethernet-phy@7 { /* KSZ9031RN */
>> +			reg = <7>;
> 
> reset-gpios is missing. I see that the vendor u-boot does it
> in board code, but you don't want Linux to depend on this.
> 
>> +		};
>> +	};
>> +};
>> +
>> +&i2c1 {
>> +	pinctrl-names = "default", "sleep";
>> +	pinctrl-0 = <&i2c1_pins_a>;
>> +	pinctrl-1 = <&i2c1_sleep_pins_a>;
>> +	i2c-scl-rising-time-ns = <100>;
>> +	i2c-scl-falling-time-ns = <7>;
>> +	status = "okay";
>> +	/delete-property/dmas;
>> +	/delete-property/dma-names;
>> +};
>> +
>> +&sdmmc1 {
>> +	pinctrl-names = "default", "opendrain", "sleep";
>> +	pinctrl-0 = <&sdmmc1_b4_pins_a>;
>> +	pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
>> +	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
>> +	cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
>> +	disable-wp;
>> +	st,neg-edge;
>> +	bus-width = <4>;
>> +	vmmc-supply = <&v3v3>;
>> +	status = "okay";
>> +};
>> +
>> +&uart4 {
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <&uart4_pins_a>;
>> +	status = "okay";
>> +};
>> +
>>
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ