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Message-ID: <CALCETrV6yTjFzuTMEP8T9_QfjAXktHZcMXSqionZGJ=Lj0YdFg@mail.gmail.com>
Date: Fri, 31 Jul 2020 18:28:37 -0700
From: Andy Lutomirski <luto@...nel.org>
To: Fenghua Yu <fenghua.yu@...el.com>
Cc: Thomas Gleixner <tglx@...utronix.de>,
Joerg Roedel <joro@...tes.org>, Ingo Molnar <mingo@...hat.com>,
Borislav Petkov <bp@...en8.de>,
Peter Zijlstra <peterz@...radead.org>,
H Peter Anvin <hpa@...or.com>,
David Woodhouse <dwmw2@...radead.org>,
Lu Baolu <baolu.lu@...ux.intel.com>,
Felix Kuehling <Felix.Kuehling@....com>,
Dave Hansen <dave.hansen@...el.com>,
Tony Luck <tony.luck@...el.com>,
Jean-Philippe Brucker <jean-philippe@...aro.org>,
Christoph Hellwig <hch@...radead.org>,
Ashok Raj <ashok.raj@...el.com>,
Jacob Jun Pan <jacob.jun.pan@...el.com>,
Dave Jiang <dave.jiang@...el.com>,
Sohil Mehta <sohil.mehta@...el.com>,
Ravi V Shankar <ravi.v.shankar@...el.com>,
linux-kernel <linux-kernel@...r.kernel.org>,
x86 <x86@...nel.org>, iommu <iommu@...ts.linux-foundation.org>,
amd-gfx <amd-gfx@...ts.freedesktop.org>
Subject: Re: [PATCH v6 12/12] x86/traps: Fix up invalid PASID
On Mon, Jul 13, 2020 at 4:48 PM Fenghua Yu <fenghua.yu@...el.com> wrote:
>
> A #GP fault is generated when ENQCMD instruction is executed without
> a valid PASID value programmed in the current thread's PASID MSR. The
> #GP fault handler will initialize the MSR if a PASID has been allocated
> for this process.
Let's take a step back here. Why are we trying to avoid IPIs? If you
call munmap(), you IPI other CPUs running tasks in the current mm. If
you do perf_event_open() and thus acquire RDPMC permission, you IPI
other CPUs running tasks in the current mm. If you call modify_ldt(),
you IPI other CPUs running tasks in the current mm. These events can
all happen more than once per process.
Now we have ENQCMD. An mm can be assigned a PASID *once* in the model
that these patches support. Why not just send an IPI using
essentially identical code to the LDT sync or the CR4.PCE sync?
--Andy
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