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Message-ID: <20200803131147.GA476@kozik-lap>
Date: Mon, 3 Aug 2020 15:13:15 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Guillaume Tucker <guillaume.tucker@...labora.com>
Cc: Russell King <linux@...linux.org.uk>,
Kukjin Kim <kgene@...nel.org>,
Rob Herring <robh+dt@...nel.org>, kernel@...labora.com,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/3] ARM: exynos: use DT prefetch attributes rather than
l2c_aux_val
On Wed, Jul 29, 2020 at 02:47:33PM +0100, Guillaume Tucker wrote:
> Use the standard l2c2x0 device tree bindings to enable data and
> instruction prefetch on exynos4210 and exynos4412 and clear the
> respective bits in the default l2c_aux_val. No other Exynos platform
> relying on this default register value appears to be using the l2x0
> cache.
>
> Signed-off-by: Guillaume Tucker <guillaume.tucker@...labora.com>
> ---
> arch/arm/boot/dts/exynos4210.dtsi | 2 ++
> arch/arm/boot/dts/exynos4412.dtsi | 2 ++
> arch/arm/mach-exynos/exynos.c | 4 ++--
I will need these split between DTS and mach changes.
Best regards,
Krzysztof
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