linux-kernel - Re: [PATCH 0/2] locking/qspinlock: Break qspinlock

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Message-ID: <04d25afe-d258-86ba-b2d1-cee8b60ee227@synopsys.com>
Date:   Thu, 6 Aug 2020 03:37:31 +0000
From:   Vineet Gupta <Vineet.Gupta1@...opsys.com>
To:     Herbert Xu <herbert@...dor.apana.org.au>,
        Andy Shevchenko <andy.shevchenko@...il.com>
CC:     Alexey Brodkin <Alexey.Brodkin@...opsys.com>,
        Waiman Long <longman@...hat.com>,
        Stephen Rothwell <sfr@...b.auug.org.au>,
        Petr Mladek <pmladek@...e.com>,
        Linux Next Mailing List <linux-next@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Sergey Senozhatsky <sergey.senozhatsky@...il.com>,
        "Steven Rostedt (VMware)" <rostedt@...dmis.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>,
        arcml <linux-snps-arc@...ts.infradead.org>
Subject: Re: [PATCH 0/2] locking/qspinlock: Break qspinlock_types.h header
 loop

On 7/30/20 12:50 AM, Herbert Xu wrote:
> On Thu, Jul 30, 2020 at 10:47:16AM +0300, Andy Shevchenko wrote:
>> We may ask Synopsys folks to look at this as well.
>> Vineet, any ideas if we may unify ATOMIC64_INIT() across the architectures?
> I don't think there is any technical difficulty.  The custom
> atomic64_t simply adds an alignment requirement so the initialisor
> remains the same.

Exactly so.

FWIW the alignment requirement is because ARC ABI allows 64-bit data to be 32-bit
aligned provided hardware deals fine with 4 byte aligned for the non-atomic
double-load/store LDD/STD instructions. The 64-bit alignement however is required
for atomic double load/store LLOCKD/SCONDD instructions hence the definition of
ARC atomic64_t

-Vineet