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Date:   Thu, 6 Aug 2020 09:29:48 +0530
From:   Rohit Kumar <rohitkr@...eaurora.org>
To:     Stephen Boyd <sboyd@...nel.org>, agross@...nel.org,
        alsa-devel@...a-project.org, bgoswami@...eaurora.org,
        bjorn.andersson@...aro.org, broonie@...nel.org,
        devicetree@...r.kernel.org, lgirdwood@...il.com,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        perex@...ex.cz, plai@...eaurora.org, robh+dt@...nel.org,
        srinivas.kandagatla@...aro.org, tiwai@...e.com
Cc:     Ajit Pandey <ajitp@...eaurora.org>
Subject: Re: [PATCH v4 01/12] ASoC: qcom: Add common array to initialize soc
 based core clocks

Thanks Stephen for reviewing.

On 8/6/2020 6:01 AM, Stephen Boyd wrote:
> Quoting Rohit kumar (2020-07-22 03:31:44)
>> From: Ajit Pandey <ajitp@...eaurora.org>
>>
>> LPASS variants have their own soc specific clocks that needs to be
>> enabled for MI2S audio support. Added a common variable in drvdata to
>> initialize such clocks using bulk clk api. Such clock names is
>> defined in variants specific data and needs to fetched during init.
> Why not just get all the clks and not even care about the names of them?
> Use devm_clk_bulk_get_all() for that, unless some clks need to change
> rates?

There is ahbix clk which needs clk rate to be set. Please check below 
patch in

the series for reference

[PATCH v5 02/12] ASoC: qcom: lpass-cpu: Move ahbix clk to platform 
specific function

Thanks,

Rohit

-- 
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