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Message-ID: <a6ab438e-8ca8-999f-9eb9-c43fe1b9f128@intel.com>
Date: Thu, 6 Aug 2020 12:57:26 -0700
From: Dave Hansen <dave.hansen@...el.com>
To: Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...nel.org>, Borislav Petkov <bp@...e.de>,
Andy Lutomirski <luto@...nel.org>, x86@...nel.org
Cc: Tony Luck <tony.luck@...el.com>,
Cathy Zhang <cathy.zhang@...el.com>,
Fenghua Yu <fenghua.yu@...el.com>,
"H. Peter Anvin" <hpa@...or.com>,
Kyung Min Park <kyung.min.park@...el.com>,
"Peter Zijlstra (Intel)" <peterz@...radead.org>,
"Ravi V. Shankar" <ravi.v.shankar@...el.com>,
Sean Christopherson <sean.j.christopherson@...el.com>,
linux-kernel@...r.kernel.org,
Ricardo Neri <ricardo.neri@...el.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
linux-edac@...r.kernel.org
Subject: Re: [PATCH v3] x86/cpu: Use SERIALIZE in sync_core() when available
On 8/6/20 12:25 PM, Ricardo Neri wrote:
> static inline void sync_core(void)
> {
> /*
> - * There are quite a few ways to do this. IRET-to-self is nice
> + * Hardware can do this for us if SERIALIZE is available. Otherwise,
> + * there are quite a few ways to do this. IRET-to-self is nice
This seems to imply that things other than SERIALIZE aren't the hardware
doing this. All of these methods are equally architecturally
serializing *and* provided by the hardware.
I also don't quite get the point of separating the comments from the
code. Shouldn't this be:
/*
* The SERIALIZE instruction is the most straightforward way to
* do this but it not universally available.
*/
if (static_cpu_has(X86_FEATURE_SERIALIZE)) {
asm volatile(__ASM_SERIALIZE ::: "memory");
return;
}
/*
* For all other processors, IRET-to-self is nice ...
*/
iret_to_self();
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