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Message-ID: <CAA+D8AOqaEEGuVp_vaSf6XAyjjCd=azj2qgKkqagvrtBNr9Mqw@mail.gmail.com>
Date:   Fri, 7 Aug 2020 15:17:57 +0800
From:   Shengjiu Wang <shengjiu.wang@...il.com>
To:     Mark Brown <broonie@...nel.org>
Cc:     Shengjiu Wang <shengjiu.wang@....com>,
        Linux-ALSA <alsa-devel@...a-project.org>,
        Timur Tabi <timur@...nel.org>, Xiubo Li <Xiubo.Lee@...il.com>,
        linuxppc-dev@...ts.ozlabs.org, Takashi Iwai <tiwai@...e.com>,
        Liam Girdwood <lgirdwood@...il.com>,
        Nicolin Chen <nicoleotsuka@...il.com>,
        Fabio Estevam <festevam@...il.com>,
        linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] ASoC: fsl-asoc-card: Get "extal" clock rate by clk_get_rate

On Thu, Aug 6, 2020 at 8:39 PM Mark Brown <broonie@...nel.org> wrote:
>
> On Thu, Aug 06, 2020 at 03:39:45PM +0800, Shengjiu Wang wrote:
>
> >       } else if (of_node_name_eq(cpu_np, "esai")) {
> > +             struct clk *esai_clk = clk_get(&cpu_pdev->dev, "extal");
> > +
> > +             if (!IS_ERR(esai_clk)) {
> > +                     priv->cpu_priv.sysclk_freq[TX] = clk_get_rate(esai_clk);
> > +                     priv->cpu_priv.sysclk_freq[RX] = clk_get_rate(esai_clk);
> > +                     clk_put(esai_clk);
> > +             }
>
> This should handle probe deferral.  Also if this clock is in use
> shouldn't we be enabling it?  It looks like it's intended to be a
> crystal so it's probably forced on all the time but sometimes there's
> power control for crystals, or perhaps someone might do something
> unusual with the hardware.

Ok, will add handler for probe deferral.

This clock is not a crystal, "extal" clock is for cpu dai, it is from
soc internal PLL. which is enabled by cpu dai, here is just to
get the clock rate.

best regards
wang shengjiu

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