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Date: Fri, 7 Aug 2020 21:58:52 -0700 From: Guenter Roeck <linux@...ck-us.net> To: Florian Fainelli <f.fainelli@...il.com>, madhuparnabhowmik10@...il.com Cc: wim@...ux-watchdog.org, linux-watchdog@...r.kernel.org, linux-kernel@...r.kernel.org, andrianov@...ras.ru, ldv-project@...uxtesting.org Subject: Re: [PATCH] drivers: watchdog: rdc321x_wdt: Fix race condition bugs [ ... ] > The R8610-G datasheet is the one that I have had and used thus far. > Mine is draft version 0.2. Do you have a newer version, by any chance ? >> Unfortunately, none of those >> describes the use of bit(31) in the watchdog register, nor the meaning >> of bit(12) and bit(13). Bit(31) is described in the code as "Mask", >> and it is set by a couple of commands. I _suspect_ that bit(31) has to be >> set to change some of the register bits, for example the counter value. >> That is just a wild guess, but it would explain why the driver works >> in the first place. >> >> It is also not clear if the bits in the counter register are accumulative >> or if only the highest bit counts. The datasheets suggest that only the >> highest bit counts, but then the value of RDC_CLS_TMR doesn't make much >> sense since it sets two bits. >> >> Since you wrote the driver, I was hoping that you might have a datasheet >> which explains all this in more detail. > > I do not, and this was over 12 years ago, and I honestly do not recall > all the details, when I get the board running a newish kernel, I will > poke around. > Surprise :-) Thanks, Guenter
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