linux-kernel - Re: [v2,5/6] reset-controller: ti: Introduce force-update method

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Message-ID: <1597042656.11360.39.camel@mhfsdcap03>
Date:   Mon, 10 Aug 2020 14:57:36 +0800
From:   Crystal Guo <crystal.guo@...iatek.com>
To:     Philipp Zabel <p.zabel@...gutronix.de>, Suman Anna <s-anna@...com>,
        "Andrew F. Davis" <afd@...com>
CC:     "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        srv_heupstream <srv_heupstream@...iatek.com>,
        "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Seiya Wang (王迺君) 
        <seiya.wang@...iatek.com>,
        Stanley Chu (朱原陞) 
        <stanley.chu@...iatek.com>,
        Yingjoe Chen (陳英洲) 
        <Yingjoe.Chen@...iatek.com>,
        Fan Chen (陳凡) 
        <fan.chen@...iatek.com>,
        "Yong Liang (梁勇)" 
        <Yong.Liang@...iatek.com>, "Suman Anna" <s-anna@...com>,
        "Andrew F. Davis" <afd@...com>
Subject: Re: [v2,5/6] reset-controller: ti: Introduce force-update method

On Tue, 2020-08-04 at 15:03 +0800, Philipp Zabel wrote:
> Hi Crystal,
> 
> On Mon, 2020-08-03 at 14:15 +0800, Crystal Guo wrote:
> > Introduce force-update method for assert and deassert interface,
> > which force the write operation in case the read already happens
> > to return the correct value.
> > 
> > Signed-off-by: Crystal Guo <crystal.guo@...iatek.com>
> 
> Added Suman and Andrew for confirmation: I think writing unconditionally
> can't break any existing user. Just changing to regmap_write_bits()
> instead of adding the update-force property as in v1 should be fine.
> 
> regards
> Philipp
> 
Hi Suman, Andrew,

Can you help to give some suggestions about this change.
Is this can be changed to write unconditionally, or should I add a
update-force property to force the write operation.

Best regards
Crystal.

> > ---
> >  drivers/reset/reset-ti-syscon.c | 15 +++++++++++++--
> >  1 file changed, 13 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c
> > index 1c74bcb9a6c3..f4baf78afd14 100644
> > --- a/drivers/reset/reset-ti-syscon.c
> > +++ b/drivers/reset/reset-ti-syscon.c
> > @@ -57,6 +57,7 @@ struct ti_syscon_reset_data {
> >  	struct ti_syscon_reset_control *controls;
> >  	unsigned int nr_controls;
> >  	bool assert_deassert_together;
> > +	bool update_force;
> >  };
> >  
> >  #define to_ti_syscon_reset_data(rcdev)	\
> > @@ -90,7 +91,10 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev,
> >  	mask = BIT(control->assert_bit);
> >  	value = (control->flags & ASSERT_SET) ? mask : 0x0;
> >  
> > -	return regmap_update_bits(data->regmap, control->assert_offset, mask, value);
> > +	if (data->update_force)
> > +		return regmap_write_bits(data->regmap, control->assert_offset, mask, value);
> > +	else
> > +		return regmap_update_bits(data->regmap, control->assert_offset, mask, value);
> >  }
> >  
> >  /**
> > @@ -121,7 +125,10 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev,
> >  	mask = BIT(control->deassert_bit);
> >  	value = (control->flags & DEASSERT_SET) ? mask : 0x0;
> >  
> > -	return regmap_update_bits(data->regmap, control->deassert_offset, mask, value);
> > +	if (data->update_force)
> > +		return regmap_write_bits(data->regmap, control->deassert_offset, mask, value);
> > +	else
> > +		return regmap_update_bits(data->regmap, control->deassert_offset, mask, value);
> >  }
> >  
> >  /**
> > @@ -223,6 +230,10 @@ static int ti_syscon_reset_probe(struct platform_device *pdev)
> >  		data->assert_deassert_together = true;
> >  	else
> >  		data->assert_deassert_together = false;
> > +	if (of_property_read_bool(np, "update-force"))
> > +		data->update_force = true;
> > +	else
> > +		data->update_force = false;
> >  
> >  	data->rcdev.ops = &ti_syscon_reset_ops;
> >  	data->rcdev.owner = THIS_MODULE;
> > -- 
> > 2.18.0