lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 11 Aug 2020 07:50:35 +0800
From:   "Zhang, Cathy" <cathy.zhang@...el.com>
To:     Paolo Bonzini <pbonzini@...hat.com>, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org, x86@...nel.org
Cc:     sean.j.christopherson@...el.com, gregkh@...uxfoundation.org,
        tglx@...utronix.de, tony.luck@...el.com, dave.hansen@...el.com,
        kyung.min.park@...el.com, ricardo.neri-calderon@...ux.intel.com,
        vkuznets@...hat.com, wanpengli@...cent.com, jmattson@...gle.com,
        joro@...tes.org, mingo@...hat.com, bp@...en8.de, hpa@...or.com,
        jpoimboe@...hat.com, ak@...ux.intel.com, ravi.v.shankar@...el.com
Subject: Re: [PATCH v3 2/2] x86/kvm: Expose new features for supported cpuid

On 8/10/2020 1:14 AM, Paolo Bonzini wrote:
> On 09/08/20 09:47, Cathy Zhang wrote:
>> Expose the SERIALIZE and TSX Suspend Load Address Tracking
>> features in KVM CPUID, so when running on processors which
>> support them, KVM could pass this information to guests and
>> they can make use of these features accordingly.
>>
>> SERIALIZE is a faster serializing instruction which does not modify
>> registers, arithmetic flags or memory, will not cause VM exit. It's
>> availability is indicated by CPUID.(EAX=7,ECX=0):ECX[bit 14].
>>
>> TSX suspend load tracking instruction aims to give a way to choose
>> which memory accesses do not need to be tracked in the TSX read set.
>> It's availability is indicated as CPUID.(EAX=7,ECX=0):EDX[bit 16].
>>
>> Those instructions are currently documented in the the latest "extensions"
>> manual (ISE). It will appear in the "main" manual (SDM) in the future.
>>
>> Signed-off-by: Cathy Zhang <cathy.zhang@...el.com>
>> Reviewed-by: Tony Luck <tony.luck@...el.com>
>> ---
>> Changes since v2:
>>   * Merge two patches into a single one. (Luck, Tony)
>>   * Add overview introduction for features. (Sean Christopherson)
>>   * Refactor commit message to explain why expose feature bits. (Luck, Tony)
>> ---
>>   arch/x86/kvm/cpuid.c | 3 ++-
>>   1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
>> index 8a294f9..dcf48cc 100644
>> --- a/arch/x86/kvm/cpuid.c
>> +++ b/arch/x86/kvm/cpuid.c
>> @@ -341,7 +341,8 @@ void kvm_set_cpu_caps(void)
>>   	kvm_cpu_cap_mask(CPUID_7_EDX,
>>   		F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
>>   		F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
>> -		F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM)
>> +		F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) |
>> +		F(SERIALIZE) | F(TSXLDTRK)
>>   	);
>>   
>>   	/* TSC_ADJUST and ARCH_CAPABILITIES are emulated in software. */
>>
> TSXLDTRK is not going to be in 5.9 as far as I can see, so I split back
> again the patches (this is why I prefer them to be split, sorry Tony :))
> and committed the SERIALIZE part.
>
> Paolo

Hello Paolo,

As you suggest, I will split the kvm patch into two parts, SERIALIZE and 
TSXLDTRK, and this series will include three patches then, 2 kvm patches 
and 1 kernel patch. SERIALIZE could get merged into 5.9, but TSXLDTRK 
should wait for the next release. I just want to double confirm with 
you, please help correct me if I'm wrong.

Powered by blists - more mailing lists