linux-kernel - R: [RFC PATCH v2 2/2] dt-bindings: cpufreq: Document Krait CPU Cache scaling

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <061301d66f07$8beae690$a3c0b3b0$@gmail.com>
Date:   Mon, 10 Aug 2020 13:15:24 +0200
From:   <ansuelsmth@...il.com>
To:     "'Sudeep Holla'" <sudeep.holla@....com>
Cc:     "'Viresh Kumar'" <viresh.kumar@...aro.org>,
        "'Rafael J. Wysocki'" <rjw@...ysocki.net>,
        "'Rob Herring'" <robh+dt@...nel.org>, <linux-pm@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: R: [RFC PATCH v2 2/2] dt-bindings: cpufreq: Document Krait CPU Cache scaling



> -----Messaggio originale-----
> Da: Sudeep Holla <sudeep.holla@....com>
> Inviato: lunedì 10 agosto 2020 10:02
> A: Ansuel Smith <ansuelsmth@...il.com>
> Cc: Viresh Kumar <viresh.kumar@...aro.org>; Rafael J. Wysocki
> <rjw@...ysocki.net>; Rob Herring <robh+dt@...nel.org>; linux-
> pm@...r.kernel.org; devicetree@...r.kernel.org; linux-
> kernel@...r.kernel.org
> Oggetto: Re: [RFC PATCH v2 2/2] dt-bindings: cpufreq: Document Krait CPU
> Cache scaling
> 
> On Sat, Aug 08, 2020 at 01:49:12AM +0200, Ansuel Smith wrote:
> > Document dedicated Krait CPU Cache Scaling driver.
> >
> > Signed-off-by: Ansuel Smith <ansuelsmth@...il.com>
> > ---
> >  .../bindings/cpufreq/krait-cache-scale.yaml   | 92
> +++++++++++++++++++
> >  1 file changed, 92 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/cpufreq/krait-
> cache-scale.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/cpufreq/krait-cache-
> scale.yaml b/Documentation/devicetree/bindings/cpufreq/krait-cache-
> scale.yaml
> > new file mode 100644
> > index 000000000000..f10b1f386a99
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/cpufreq/krait-cache-
> scale.yaml
> > @@ -0,0 +1,92 @@
> > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/cpufreq/krait-cache-scale.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Krait Cpu Cache Frequency Scaling dedicated driver
> > +
> > +maintainers:
> > +  - Ansuel Smith <ansuelsmth@...il.com>
> > +
> > +description: |
> > +  This Scale the Krait CPU Cache Frequency and optionally voltage
> > +  when the Cpu Frequency is changed (using the cpufreq notifier).
> > +
> > +  Cache is scaled with the max frequency across all core and the cache
> > +  frequency will scale based on the configured threshold in the dts.
> > +
> > +  The cache is hardcoded to 3 frequency bin, idle, nominal and high.
> > +
> > +properties:
> > +  compatible:
> > +    const: qcom,krait-cache
> > +
> 
> How does this fit in the standard cache hierarchy nodes ? Extend the
> example to cover that.
> 

I think i didn't understand this question. You mean that I should put
in the example how the standard l2 cache nodes are defined?

> > +  clocks:
> > +    description: Phandle to the L2 CPU clock
> > +
> > +  clock-names:
> > +    const: "l2"
> > +
> > +  voltage-tolerance:
> > +    description: Same voltage tollerance of the Krait CPU
> > +
> > +  l2-rates:
> > +    description: |
> > +      Frequency the L2 cache will be scaled at.
> > +      Value is in Hz.
> > +    $ref: /schemas/types.yaml#/definitions/uint32-array
> > +    items:
> > +      - description: idle
> > +      - description: nominal
> > +      - description: high
> > +
> 
> Why can't you re-use the standard OPP v2 bindings ?
> 

Isn't overkill to use the OPP v2 bindings to represent the the microvolt
related
to the le freq? Is the OPP v1 sufficient? Also I can't find a way to reflect
this specific
case where the l2 rates are changed based on the cpu freq value? Any idea
about that?

> --
> Regards,
> Sudeep