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Message-ID: <CAKMK7uGcbaABtUuzWpOi8TA=ERSHBP6hwiX-YnQSXVHKWQo+mA@mail.gmail.com>
Date: Tue, 11 Aug 2020 22:37:04 +0200
From: Daniel Vetter <daniel@...ll.ch>
To: Venkateshwar Rao Gannavarapu
<venkateshwar.rao.gannavarapu@...inx.com>
Cc: Hyun Kwon <hyun.kwon@...inx.com>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
dri-devel <dri-devel@...ts.freedesktop.org>,
Dave Airlie <airlied@...ux.ie>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
sandipk@...inx.com, vgannava@...inx.com
Subject: Re: [RFC PATCH V2 0/2] Add Xilinx DSI TX driver
On Tue, Aug 11, 2020 at 2:46 AM Venkateshwar Rao Gannavarapu
<venkateshwar.rao.gannavarapu@...inx.com> wrote:
>
> Xilinx DSI-TX subsytem consists of DSI controller core, AXI crossbar
> and D-PHY as sub blocks. DSI TX subsystem driver supports multiple lanes
> upto 4, RGB color formats, video mode and command modes.
>
> DSI-TX driver is implemented as an encoder driver, as it going to be
> the final node in display pipeline. Xilinx doesn't support any converter
> logic to make this as bridge driver. Xilinx doesn't have such
> use cases where end node can't be an encoder like DSI-TX. And Xilinx
> encoder drivers represents a subsystem where individual blocks can't be
> used with external components / encoders.
So there's indeed a bit of an argument about when it should just be
stitched together as components, and when it is better a bridge. But
bridges also come with plenty of convenience glue, and we're talking
about fpga so the point pretty much is to rewire this all eventually.
Maybe not by you folks, but people are r/e-ing these things so who
knows.
The other thing is you do have a bridge attached already, or should
have: The drm_panel. And you do get the entire drm-connector
instantiation rather wrong, at least the ->dpms hook is breaking
atomic real bad. The ->detect implementation is also quite the
adventure. So panel bridge is definitely required here.
Finally this also would avoid component.c usage in xlnx - not that
there's something wrong with that per se, but it always means driver
specific logic and interactions, so harder to maintain for people not
involved in the code base on a daily basis. Also I'm not sure how this
works, the component integration glue in the main driver seems to be
missing. And the upstream drm/xlnx doesn't seem to have it either.
So all together I do think drm_bridge sounds like the right thing to do here.
-Daniel
>
> Venkateshwar Rao Gannavarapu (2):
> dt-bindings: display: xlnx: dsi: This add a DT binding for Xilinx DSI
> TX subsystem.
> drm: xlnx: dsi: driver for Xilinx DSI TX subsystem
>
> .../devicetree/bindings/display/xlnx/xlnx,dsi.yaml | 147 +++++
> drivers/gpu/drm/xlnx/Kconfig | 11 +
> drivers/gpu/drm/xlnx/Makefile | 2 +
> drivers/gpu/drm/xlnx/xlnx_dsi.c | 701 +++++++++++++++++++++
> 4 files changed, 861 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/xlnx/xlnx,dsi.yaml
> create mode 100644 drivers/gpu/drm/xlnx/xlnx_dsi.c
>
> --
> 1.8.3.1
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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