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Message-ID: <20200812163654.GT6057@pendragon.ideasonboard.com>
Date: Wed, 12 Aug 2020 19:36:54 +0300
From: Laurent Pinchart <laurent.pinchart@...asonboard.com>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Cc: Geert Uytterhoeven <geert+renesas@...der.be>,
Kieran Bingham <kieran.bingham+renesas@...asonboard.com>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Rob Herring <robh+dt@...nel.org>,
Magnus Damm <magnus.damm@...il.com>,
dri-devel@...ts.freedesktop.org, linux-renesas-soc@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Prabhakar <prabhakar.csengg@...il.com>
Subject: Re: [PATCH 9/9] arm64: dts: renesas: r8a774e1-hihope-rzg2h: Setup DU
clocks
Hi Prabhakar,
Thank you for the patch.
On Wed, Aug 12, 2020 at 03:02:17PM +0100, Lad Prabhakar wrote:
> Setup up the required clocks for the DU to be functional.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> ---
> arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h.dts | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h.dts b/arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h.dts
> index cdbe527e9340..12f9242e263b 100644
> --- a/arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h.dts
> @@ -24,3 +24,14 @@
> reg = <0x5 0x00000000 0x0 0x80000000>;
> };
> };
> +
> +&du {
> + clocks = <&cpg CPG_MOD 724>,
> + <&cpg CPG_MOD 723>,
> + <&cpg CPG_MOD 721>,
> + <&versaclock5 1>,
> + <&x302_clk>,
> + <&versaclock5 2>;
> + clock-names = "du.0", "du.1", "du.3",
> + "dclkin.0", "dclkin.1", "dclkin.3";
I have no reason to doubt this is correct, but I also can't assess that
as I don't have access to the schematics.
Acked-by: Laurent Pinchart <laurent.pinchart@...asonboard.com>
> +};
--
Regards,
Laurent Pinchart
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