linux-kernel - Re: [PATCH v2] riscv: Setup exception vector for nommu platform

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Message-ID: <CY4PR04MB3751ECCFBE6B590E9D0850B0E7430@CY4PR04MB3751.namprd04.prod.outlook.com>
Date:   Thu, 13 Aug 2020 05:44:23 +0000
From:   Damien Le Moal <Damien.LeMoal@....com>
To:     Qiu Wenbo <qiuwenbo@...tium.com.cn>,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>
CC:     Anup Patel <anup@...infault.org>,
        Atish Patra <atishp@...shpatra.org>,
        Albert Ou <aou@...s.berkeley.edu>,
        Anup Patel <Anup.Patel@....com>,
        Atish Patra <Atish.Patra@....com>,
        Greentime Hu <greentime.hu@...ive.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2] riscv: Setup exception vector for nommu platform

On 2020/08/13 12:40, Qiu Wenbo wrote:
> Exception vector is missing on nommu platform and that is an issue.
> This patch is tested in Sipeed Maix Bit Dev Board.
> 
> Fixes: 79b1feba5455 ("RISC-V: Setup exception vector early")
> Suggested-by: Anup Patel <anup@...infault.org>
> Suggested-by: Atish Patra <atishp@...shpatra.org>
> Signed-off-by: Qiu Wenbo <qiuwenbo@...tium.com.cn>

Please add a cc stable #5.8 tag. Kendryte support is in 5.8 stable.

> ---
>  arch/riscv/kernel/head.S | 25 +++++++++++++++++--------
>  1 file changed, 17 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
> index d0c5c316e9bb..0a4e81b8dc79 100644
> --- a/arch/riscv/kernel/head.S
> +++ b/arch/riscv/kernel/head.S
> @@ -77,16 +77,10 @@ relocate:
>  	csrw CSR_SATP, a0
>  .align 2
>  1:
> -	/* Set trap vector to exception handler */
> -	la a0, handle_exception
> +	/* Set trap vector to spin forever to help debug */
> +	la a0, .Lsecondary_park
>  	csrw CSR_TVEC, a0
>  
> -	/*
> -	 * Set sup0 scratch register to 0, indicating to exception vector that
> -	 * we are presently executing in kernel.
> -	 */
> -	csrw CSR_SCRATCH, zero
> -
>  	/* Reload the global pointer */
>  .option push
>  .option norelax
> @@ -144,9 +138,23 @@ secondary_start_common:
>  	la a0, swapper_pg_dir
>  	call relocate
>  #endif
> +	call setup_trap_vector
>  	tail smp_callin
>  #endif /* CONFIG_SMP */
>  
> +.align 2
> +setup_trap_vector:
> +	/* Set trap vector to exception handler */
> +	la a0, handle_exception
> +	csrw CSR_TVEC, a0
> +
> +	/*
> +	 * Set sup0 scratch register to 0, indicating to exception vector that
> +	 * we are presently executing in kernel.
> +	 */
> +	csrw CSR_SCRATCH, zero
> +	ret
> +
>  .Lsecondary_park:
>  	/* We lack SMP support or have too many harts, so park this hart */
>  	wfi
> @@ -240,6 +248,7 @@ clear_bss_done:
>  	call relocate
>  #endif /* CONFIG_MMU */
>  
> +	call setup_trap_vector
>  	/* Restore C environment */
>  	la tp, init_task
>  	sw zero, TASK_TI_CPU(tp)
> 


-- 
Damien Le Moal
Western Digital Research