| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <202008132346.FsljjoOC%lkp@intel.com>
Date: Thu, 13 Aug 2020 23:00:49 +0800
From: kernel test robot <lkp@...el.com>
To: Ajay Gupta <ajayg@...dia.com>
Cc: kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org
Subject: drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c:416
stmmac_probe_config_dt() warn: unsigned 'plat->phy_interface' is never less
than zero.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: dc06fe51d26efc100ac74121607c01a454867c91
commit: b9f0b2f634c0765999bec5547bc7a4ac08fda3ff net: stmmac: platform: fix probe for ACPI devices
date: 7 months ago
config: ia64-randconfig-m031-20200811 (attached as .config)
compiler: ia64-linux-gcc (GCC) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
smatch warnings:
drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c:416 stmmac_probe_config_dt() warn: unsigned 'plat->phy_interface' is never less than zero.
vim +416 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
386
387 /**
388 * stmmac_probe_config_dt - parse device-tree driver parameters
389 * @pdev: platform_device structure
390 * @mac: MAC address to use
391 * Description:
392 * this function is to read the driver parameters from device-tree and
393 * set some private fields that will be used by the main at runtime.
394 */
395 struct plat_stmmacenet_data *
396 stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
397 {
398 struct device_node *np = pdev->dev.of_node;
399 struct plat_stmmacenet_data *plat;
400 struct stmmac_dma_cfg *dma_cfg;
401 int rc;
402
403 plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
404 if (!plat)
405 return ERR_PTR(-ENOMEM);
406
407 *mac = of_get_mac_address(np);
408 if (IS_ERR(*mac)) {
409 if (PTR_ERR(*mac) == -EPROBE_DEFER)
410 return ERR_CAST(*mac);
411
412 *mac = NULL;
413 }
414
415 plat->phy_interface = device_get_phy_mode(&pdev->dev);
> 416 if (plat->phy_interface < 0)
417 return ERR_PTR(plat->phy_interface);
418
419 plat->interface = stmmac_of_get_mac_mode(np);
420 if (plat->interface < 0)
421 plat->interface = plat->phy_interface;
422
423 /* Some wrapper drivers still rely on phy_node. Let's save it while
424 * they are not converted to phylink. */
425 plat->phy_node = of_parse_phandle(np, "phy-handle", 0);
426
427 /* PHYLINK automatically parses the phy-handle property */
428 plat->phylink_node = np;
429
430 /* Get max speed of operation from device tree */
431 if (of_property_read_u32(np, "max-speed", &plat->max_speed))
432 plat->max_speed = -1;
433
434 plat->bus_id = of_alias_get_id(np, "ethernet");
435 if (plat->bus_id < 0)
436 plat->bus_id = 0;
437
438 /* Default to phy auto-detection */
439 plat->phy_addr = -1;
440
441 /* Default to get clk_csr from stmmac_clk_crs_set(),
442 * or get clk_csr from device tree.
443 */
444 plat->clk_csr = -1;
445 of_property_read_u32(np, "clk_csr", &plat->clk_csr);
446
447 /* "snps,phy-addr" is not a standard property. Mark it as deprecated
448 * and warn of its use. Remove this when phy node support is added.
449 */
450 if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0)
451 dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n");
452
453 /* To Configure PHY by using all device-tree supported properties */
454 rc = stmmac_dt_phy(plat, np, &pdev->dev);
455 if (rc)
456 return ERR_PTR(rc);
457
458 of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size);
459
460 of_property_read_u32(np, "rx-fifo-depth", &plat->rx_fifo_size);
461
462 plat->force_sf_dma_mode =
463 of_property_read_bool(np, "snps,force_sf_dma_mode");
464
465 plat->en_tx_lpi_clockgating =
466 of_property_read_bool(np, "snps,en-tx-lpi-clockgating");
467
468 /* Set the maxmtu to a default of JUMBO_LEN in case the
469 * parameter is not present in the device tree.
470 */
471 plat->maxmtu = JUMBO_LEN;
472
473 /* Set default value for multicast hash bins */
474 plat->multicast_filter_bins = HASH_TABLE_SIZE;
475
476 /* Set default value for unicast filter entries */
477 plat->unicast_filter_entries = 1;
478
479 /*
480 * Currently only the properties needed on SPEAr600
481 * are provided. All other properties should be added
482 * once needed on other platforms.
483 */
484 if (of_device_is_compatible(np, "st,spear600-gmac") ||
485 of_device_is_compatible(np, "snps,dwmac-3.50a") ||
486 of_device_is_compatible(np, "snps,dwmac-3.70a") ||
487 of_device_is_compatible(np, "snps,dwmac")) {
488 /* Note that the max-frame-size parameter as defined in the
489 * ePAPR v1.1 spec is defined as max-frame-size, it's
490 * actually used as the IEEE definition of MAC Client
491 * data, or MTU. The ePAPR specification is confusing as
492 * the definition is max-frame-size, but usage examples
493 * are clearly MTUs
494 */
495 of_property_read_u32(np, "max-frame-size", &plat->maxmtu);
496 of_property_read_u32(np, "snps,multicast-filter-bins",
497 &plat->multicast_filter_bins);
498 of_property_read_u32(np, "snps,perfect-filter-entries",
499 &plat->unicast_filter_entries);
500 plat->unicast_filter_entries = dwmac1000_validate_ucast_entries(
501 &pdev->dev, plat->unicast_filter_entries);
502 plat->multicast_filter_bins = dwmac1000_validate_mcast_bins(
503 &pdev->dev, plat->multicast_filter_bins);
504 plat->has_gmac = 1;
505 plat->pmt = 1;
506 }
507
508 if (of_device_is_compatible(np, "snps,dwmac-4.00") ||
509 of_device_is_compatible(np, "snps,dwmac-4.10a") ||
510 of_device_is_compatible(np, "snps,dwmac-4.20a")) {
511 plat->has_gmac4 = 1;
512 plat->has_gmac = 0;
513 plat->pmt = 1;
514 plat->tso_en = of_property_read_bool(np, "snps,tso");
515 }
516
517 if (of_device_is_compatible(np, "snps,dwmac-3.610") ||
518 of_device_is_compatible(np, "snps,dwmac-3.710")) {
519 plat->enh_desc = 1;
520 plat->bugged_jumbo = 1;
521 plat->force_sf_dma_mode = 1;
522 }
523
524 if (of_device_is_compatible(np, "snps,dwxgmac")) {
525 plat->has_xgmac = 1;
526 plat->pmt = 1;
527 plat->tso_en = of_property_read_bool(np, "snps,tso");
528 }
529
530 dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*dma_cfg),
531 GFP_KERNEL);
532 if (!dma_cfg) {
533 stmmac_remove_config_dt(pdev, plat);
534 return ERR_PTR(-ENOMEM);
535 }
536 plat->dma_cfg = dma_cfg;
537
538 of_property_read_u32(np, "snps,pbl", &dma_cfg->pbl);
539 if (!dma_cfg->pbl)
540 dma_cfg->pbl = DEFAULT_DMA_PBL;
541 of_property_read_u32(np, "snps,txpbl", &dma_cfg->txpbl);
542 of_property_read_u32(np, "snps,rxpbl", &dma_cfg->rxpbl);
543 dma_cfg->pblx8 = !of_property_read_bool(np, "snps,no-pbl-x8");
544
545 dma_cfg->aal = of_property_read_bool(np, "snps,aal");
546 dma_cfg->fixed_burst = of_property_read_bool(np, "snps,fixed-burst");
547 dma_cfg->mixed_burst = of_property_read_bool(np, "snps,mixed-burst");
548
549 plat->force_thresh_dma_mode = of_property_read_bool(np, "snps,force_thresh_dma_mode");
550 if (plat->force_thresh_dma_mode) {
551 plat->force_sf_dma_mode = 0;
552 dev_warn(&pdev->dev,
553 "force_sf_dma_mode is ignored if force_thresh_dma_mode is set.\n");
554 }
555
556 of_property_read_u32(np, "snps,ps-speed", &plat->mac_port_sel_speed);
557
558 plat->axi = stmmac_axi_setup(pdev);
559
560 rc = stmmac_mtl_setup(pdev, plat);
561 if (rc) {
562 stmmac_remove_config_dt(pdev, plat);
563 return ERR_PTR(rc);
564 }
565
566 /* clock setup */
567 if (!of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) {
568 plat->stmmac_clk = devm_clk_get(&pdev->dev,
569 STMMAC_RESOURCE_NAME);
570 if (IS_ERR(plat->stmmac_clk)) {
571 dev_warn(&pdev->dev, "Cannot get CSR clock\n");
572 plat->stmmac_clk = NULL;
573 }
574 clk_prepare_enable(plat->stmmac_clk);
575 }
576
577 plat->pclk = devm_clk_get(&pdev->dev, "pclk");
578 if (IS_ERR(plat->pclk)) {
579 if (PTR_ERR(plat->pclk) == -EPROBE_DEFER)
580 goto error_pclk_get;
581
582 plat->pclk = NULL;
583 }
584 clk_prepare_enable(plat->pclk);
585
586 /* Fall-back to main clock in case of no PTP ref is passed */
587 plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "ptp_ref");
588 if (IS_ERR(plat->clk_ptp_ref)) {
589 plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk);
590 plat->clk_ptp_ref = NULL;
591 dev_warn(&pdev->dev, "PTP uses main clock\n");
592 } else {
593 plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref);
594 dev_dbg(&pdev->dev, "PTP rate %d\n", plat->clk_ptp_rate);
595 }
596
597 plat->stmmac_rst = devm_reset_control_get(&pdev->dev,
598 STMMAC_RESOURCE_NAME);
599 if (IS_ERR(plat->stmmac_rst)) {
600 if (PTR_ERR(plat->stmmac_rst) == -EPROBE_DEFER)
601 goto error_hw_init;
602
603 dev_info(&pdev->dev, "no reset control found\n");
604 plat->stmmac_rst = NULL;
605 }
606
607 return plat;
608
609 error_hw_init:
610 clk_disable_unprepare(plat->pclk);
611 error_pclk_get:
612 clk_disable_unprepare(plat->stmmac_clk);
613
614 return ERR_PTR(-EPROBE_DEFER);
615 }
616
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
Download attachment ".config.gz" of type "application/gzip" (31685 bytes)
Powered by blists - more mailing lists