linux-kernel - Re: [PATCH] coresight: cti: remove pm_runtime_get

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Message-ID: <CAJ9a7VjatuzAJw8Bp6T7vkh8bCTwoNa1kve5exsedgy++Wys0g@mail.gmail.com>
Date:   Tue, 18 Aug 2020 13:47:27 +0100
From:   Mike Leach <mike.leach@...aro.org>
To:     Tingwei Zhang <tingwei@...eaurora.org>
Cc:     Mathieu Poirier <mathieu.poirier@...aro.org>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        tsoni@...eaurora.org,
        Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>,
        Mao Jinlong <jinlmao@...eaurora.org>,
        Coresight ML <coresight@...ts.linaro.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] coresight: cti: remove pm_runtime_get_sync() from CPU hotplug

On Tue, 18 Aug 2020 at 12:11, Tingwei Zhang <tingwei@...eaurora.org> wrote:
>
> Below BUG is triggered by call pm_runtime_get_sync() in
> cti_cpuhp_enable_hw(). It's in CPU hotplug callback with interrupt
> disabled. Pm_runtime_get_sync() calls clock driver to enable clock
> which could sleep. Remove pm_runtime_get_sync() in cti_cpuhp_enable_hw()
> since pm_runtime_get_sync() is called in cti_enabld and pm_runtime_put()
> is called in cti_disabled. No need to increase pm count when CPU gets
> online since it's not decreased when CPU is offline.
>
> [  105.800279] BUG: scheduling while atomic: swapper/1/0/0x00000002
> [  105.800290] Modules linked in:
> [  105.800327] CPU: 1 PID: 0 Comm: swapper/1 Tainted: G        W
> 5.9.0-rc1-gff1304be0a05-dirty #21
> [  105.800337] Hardware name: Thundercomm Dragonboard 845c (DT)
> [  105.800353] Call trace:
> [  105.800414]  dump_backtrace+0x0/0x1d4
> [  105.800439]  show_stack+0x14/0x1c
> [  105.800462]  dump_stack+0xc0/0x100
> [  105.800490]  __schedule_bug+0x58/0x74
> [  105.800523]  __schedule+0x590/0x65c
> [  105.800538]  schedule+0x78/0x10c
> [  105.800553]  schedule_timeout+0x188/0x250
> [  105.800585]  qmp_send.constprop.10+0x12c/0x1b0
> [  105.800599]  qmp_qdss_clk_prepare+0x18/0x20
> [  105.800622]  clk_core_prepare+0x48/0xd4
> [  105.800639]  clk_prepare+0x20/0x34
> [  105.800663]  amba_pm_runtime_resume+0x54/0x90
> [  105.800695]  __rpm_callback+0xdc/0x138
> [  105.800709]  rpm_callback+0x24/0x78
> [  105.800724]  rpm_resume+0x328/0x47c
> [  105.800739]  __pm_runtime_resume+0x50/0x74
> [  105.800768]  cti_starting_cpu+0x40/0xa4
> [  105.800795]  cpuhp_invoke_callback+0x84/0x1e0
> [  105.800814]  notify_cpu_starting+0x9c/0xb8
> [  105.800834]  secondary_start_kernel+0xd8/0x164
> [  105.800933] CPU1: Booted secondary processor 0x0000000100 [0x517f803c]
>
> Fixes: e9b880581d55 ("coresight: cti: Add CPU Hotplug handling to CTI driver")
> Signed-off-by: Tingwei Zhang <tingwei@...eaurora.org>
> ---
>  drivers/hwtracing/coresight/coresight-cti.c | 3 ---
>  1 file changed, 3 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-cti.c b/drivers/hwtracing/coresight/coresight-cti.c
> index 869569eb8c7f..baba6af83440 100644
> --- a/drivers/hwtracing/coresight/coresight-cti.c
> +++ b/drivers/hwtracing/coresight/coresight-cti.c
> @@ -126,9 +126,7 @@ static int cti_enable_hw(struct cti_drvdata *drvdata)
>  static void cti_cpuhp_enable_hw(struct cti_drvdata *drvdata)
>  {
>         struct cti_config *config = &drvdata->config;
> -       struct device *dev = &drvdata->csdev->dev;
>
> -       pm_runtime_get_sync(dev->parent);
>         spin_lock(&drvdata->spinlock);
>         config->hw_powered = true;
>
> @@ -148,7 +146,6 @@ static void cti_cpuhp_enable_hw(struct cti_drvdata *drvdata)
>         /* did not re-enable due to no claim / no request */
>  cti_hp_not_enabled:
>         spin_unlock(&drvdata->spinlock);
> -       pm_runtime_put(dev->parent);
>  }
>
>  /* disable hardware */
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
Reviewed-by Mike Leach <mike.leach@...aro.org>

-- 
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK